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2023-01-28 - 07:30

x86 Intel Celeron M @1500 MHz, Linux 5.15.32-rt39 (Profile)

Latency plot of system in rack #6, slot #5
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the highest latencies:
System rack6slot5.osadl.org (updated Sat Jan 28, 2023 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
313399107465342,5393cyclictest23794-21kworker/0:122:30:110
31339997905154,4625cyclictest14350-21kworker/0:119:50:210
31339996685092,4565cyclictest24414-21kworker/0:220:56:240
31339992024775,4417cyclictest14350-21kworker/0:119:39:270
31339990394692,4336cyclictest24414-21kworker/0:221:02:590
31339989904686,4290cyclictest21738-21kworker/0:023:44:050
31339988674509,4347cyclictest14350-21kworker/0:119:44:500
31339986554427,4223cyclictest19338-21kworker/0:223:24:070
31339981244047,4063cyclictest24414-21kworker/0:221:07:420
31339980244367,3606cyclictest14350-21kworker/0:119:48:510
31339980184114,3881cyclictest24414-21kworker/0:220:05:160
31339977083801,3864cyclictest14350-21kworker/0:119:59:370
31339976193835,3769cyclictest11289-21kworker/0:223:11:230
31339975624071,3480cyclictest18265-21kworker/0:219:16:080
31339973663952,3403cyclictest18265-21kworker/0:219:34:220
31339973643877,3444cyclictest30034-21kworker/0:223:55:500
31339973593699,3645cyclictest24414-21kworker/0:220:23:350
31339972823825,3415cyclictest4684-21kworker/0:222:02:090
31339972633820,3392cyclictest21738-21kworker/0:023:32:160
31339972433793,3439cyclictest27288-21kworker/0:121:45:400
31339972213884,3332cyclictest16043-21kworker/0:100:25:270
31339972183881,3326cyclictest23794-21kworker/0:122:39:390
31339972143647,3516cyclictest18265-21kworker/0:219:13:570
31339971903595,3581cyclictest24414-21kworker/0:220:17:330
31339971783847,3279cyclictest11289-21kworker/0:223:08:010
31339971363813,3280cyclictest30034-21kworker/0:200:04:550
31339970803823,3246cyclictest30034-21kworker/0:200:16:110
31339970253801,3213cyclictest24414-21kworker/0:220:12:570
31339970053675,3326cyclictest22155-21kworker/0:000:34:370
31339969663754,3207cyclictest18265-21kworker/0:219:24:390
31339969613766,3143cyclictest4684-21kworker/0:221:53:170
31339968963590,3246cyclictest30034-21kworker/0:200:14:360
31339967943331,3449cyclictest24414-21kworker/0:221:15:020
31339967743678,3085cyclictest27288-21kworker/0:121:36:370
31339967683671,3086cyclictest2774-21kworker/0:122:59:080
31339967253403,3291cyclictest30034-21kworker/0:223:47:140
31339966473509,3134cyclictest18265-21kworker/0:219:29:250
31339966363547,3007cyclictest24414-21kworker/0:220:54:580
31339965693592,2963cyclictest24414-21kworker/0:220:29:280
31339965633617,2885cyclictest16043-21kworker/0:100:23:520
31339965033526,2972cyclictest24414-21kworker/0:220:44:100
31339965013374,3075cyclictest24414-21kworker/0:220:35:580
31339964273454,2913cyclictest23794-21kworker/0:122:28:360
31339964113447,2913cyclictest24414-21kworker/0:221:26:310
31339962693326,2928cyclictest27288-21kworker/0:121:35:000
31339961643322,2799cyclictest14447-21kworker/0:122:10:590
31339958913241,2646cyclictest24414-21kworker/0:220:30:570
31339958703076,2742cyclictest24414-21kworker/0:220:48:590
31339958083266,2518cyclictest24414-21kworker/0:221:18:350
31339953532748,2593cyclictest2774-21kworker/0:122:49:250
31339951242655,2465cyclictest14350-21kworker/0:120:01:030
31339951082617,2480cyclictest19661-21kworker/0:222:21:180
31339949382517,2369cyclictest27288-21kworker/0:121:44:050
31339948392728,2080cyclictest19661-21kworker/0:222:19:430
31339947142414,2277cyclictest21738-21kworker/0:023:35:240
31339946052487,2103cyclictest30034-21kworker/0:200:07:090
29092837184,203sleep00-21swapper19:08:480
31339951325,488cyclictest0-21swapper22:52:310
31339949832,452cyclictest16504-21diskmemload00:36:460
31339945533,422cyclictest0-21swapper21:56:470
31339942247,375cyclictest0-21swapper22:44:040
31339941937,369cyclictest0-21swapper23:27:390
31339940835,373cyclictest0-21swapper23:01:590
31339940835,373cyclictest0-21swapper21:24:050
31339939579,257cyclictest3125-21cyclictest23:53:050
31339939329,364cyclictest0-21swapper22:07:180
31339939135,356cyclictest0-21swapper23:19:030
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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