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2024-09-11 - 16:11
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack6slot5.osadl.org (updated Wed Sep 11, 2024 12:43:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1391499106515391,5256cyclictest19508-21kworker/0:110:31:440
1391499106395501,5127cyclictest636-21kworker/0:007:17:160
139149997075119,4577cyclictest636-21kworker/0:008:13:010
139149996875116,4560cyclictest27001-21kworker/0:011:18:530
139149994905015,4464cyclictest636-21kworker/0:008:08:270
139149993824845,4486cyclictest19508-21kworker/0:110:40:430
139149993664769,4593cyclictest27001-21kworker/0:011:34:400
139149992024784,4414cyclictest636-21kworker/0:007:21:040
139149991884683,4501cyclictest27001-21kworker/0:012:06:460
139149991724768,4400cyclictest30283-21kworker/0:109:22:360
139149990754621,4443cyclictest636-21kworker/0:008:44:160
139149990504606,4433cyclictest10079-21kworker/0:009:41:580
139149990294589,4429cyclictest30283-21kworker/0:109:17:490
139149988784524,4350cyclictest27001-21kworker/0:011:50:160
139149988554502,4342cyclictest19508-21kworker/0:109:56:240
139149988454489,4345cyclictest27001-21kworker/0:011:29:300
139149988404489,4347cyclictest19508-21kworker/0:110:11:270
139149988384604,4229cyclictest636-21kworker/0:007:33:040
139149987424658,4080cyclictest636-21kworker/0:008:58:300
139149986964417,4265cyclictest636-21kworker/0:007:14:590
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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