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2023-01-30 - 06:17

x86 Intel Celeron M @1500 MHz, Linux 5.15.32-rt39 (Profile)

Latency plot of system in rack #6, slot #5
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack6slot5.osadl.org (updated Mon Jan 30, 2023 00:44:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
540199115506082,5457cyclictest28443-21kworker/0:119:20:090
540199101315185,4935cyclictest28443-21kworker/0:119:34:180
54019998375249,4585cyclictest28443-21kworker/0:119:12:180
54019996015004,4586cyclictest31493-21kworker/0:100:14:000
54019994034704,4684cyclictest16059-21kworker/0:019:39:370
54019990264638,4383cyclictest2719-21kworker/0:223:08:520
54019989844633,4340cyclictest31739-21kworker/0:220:34:100
54019988124365,4404cyclictest28443-21kworker/0:119:27:170
54019987974518,4268cyclictest18823-21kworker/0:223:34:120
54019980324004,3977cyclictest31739-21kworker/0:220:39:230
54019977593988,3755cyclictest2477-21kworker/0:221:50:160
54019977433867,3834cyclictest16059-21kworker/0:019:48:140
54019974953997,3456cyclictest16059-21kworker/0:019:42:450
54019973143646,3653cyclictest2477-21kworker/0:222:00:070
54019972853990,3252cyclictest31739-21kworker/0:220:19:160
54019971513794,3346cyclictest24532-21kworker/0:020:01:250
54019970993871,3217cyclictest31739-21kworker/0:220:48:120
54019969723822,3139cyclictest31739-21kworker/0:220:27:320
54019968143747,3062cyclictest26469-21kworker/0:120:14:160
54019968093641,3157cyclictest2477-21kworker/0:222:23:330
54019967513622,3115cyclictest31739-21kworker/0:220:53:240
54019967443520,3182cyclictest31739-21kworker/0:221:07:190
54019967363691,3040cyclictest31502-21kworker/0:022:46:350
54019967363683,3042cyclictest31739-21kworker/0:220:41:000
54019966833578,3094cyclictest2719-21kworker/0:222:56:540
54019966583513,3085cyclictest2477-21kworker/0:221:47:030
54019966513315,3285cyclictest31739-21kworker/0:221:00:120
54019965573468,3075cyclictest22618-21kworker/0:119:53:530
54019965563494,3056cyclictest26480-21kworker/0:021:28:380
54019965063275,3216cyclictest2477-21kworker/0:222:45:000
54019964263435,2980cyclictest12829-21kworker/0:123:21:000
54019963933417,2965cyclictest26480-21kworker/0:021:38:060
54019963673407,2949cyclictest2477-21kworker/0:222:34:550
54019963483337,2996cyclictest25805-21kworker/0:123:46:320
54019962453327,2903cyclictest2477-21kworker/0:222:10:500
54019962173296,2861cyclictest12829-21kworker/0:123:19:250
54019961493068,3040cyclictest20059-21kworker/0:021:18:210
54019961193304,2772cyclictest31493-21kworker/0:123:59:140
54019960833326,2697cyclictest20059-21kworker/0:021:15:040
54019960033140,2859cyclictest22618-21kworker/0:119:55:300
54019959903187,2751cyclictest28443-21kworker/0:119:18:150
54019959723223,2739cyclictest2477-21kworker/0:222:01:410
54019957673173,2542cyclictest31493-21kworker/0:100:24:520
54019957603101,2648cyclictest31739-21kworker/0:220:20:430
54019954013099,2263cyclictest31493-21kworker/0:100:28:140
54019950752682,2389cyclictest31493-21kworker/0:100:00:500
54019948132526,2282cyclictest26469-21kworker/0:120:08:010
49122883185,203sleep00-21swapper19:06:410
54019950752,440cyclictest29522-21ssh22:38:120
54019947949,360cyclictest18492-21diskmemload00:38:210
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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