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2023-06-10 - 09:13

x86 Intel Celeron M @1600 MHz, Linux 5.4.74-rt41 (Profile)

Latency plot of system in rack #6, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the highest latencies:
System rack6slot6.osadl.org (updated Sat Jun 10, 2023 00:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
273229910746353465,53873cyclictest17555-21ssh21:20:430
273229910704053412,53536cyclictest0-21swapper20:35:300
273229910703153425,53541cyclictest3950irq/9-acpi23:11:550
273229910674353415,53237cyclictest0-21swapper20:07:320
273229910658253477,53105cyclictest0-21swapper20:10:130
273229910656353401,53099cyclictest9-21ksoftirqd/023:07:340
273229910649053440,53050cyclictest0-21swapper22:22:010
273229910648853436,52957cyclictest9098-21diskmemload21:26:150
273229910647853458,53020cyclictest0-21swapper00:29:380
273229910647753459,53018cyclictest0-21swapper23:32:010
273229910646953456,53013cyclictest0-21swapper19:59:100
273229910646253455,53007cyclictest0-21swapper22:17:400
273229910645753450,53007cyclictest0-21swapper21:12:510
273229910644953443,53006cyclictest0-21swapper00:09:520
273229910644253399,53043cyclictest0-21swapper00:14:230
273229910643753438,52999cyclictest0-21swapper20:50:550
273229910643353436,52997cyclictest0-21swapper21:51:320
273229910643353396,53037cyclictest0-21swapper21:39:080
273229910642053389,53031cyclictest0-21swapper22:43:570
273229910641153422,52989cyclictest0-21swapper21:58:340
273229910636453404,52895cyclictest9-21ksoftirqd/000:20:450
273229910631053478,52832cyclictest0-21swapper20:18:550
273229910630253414,52822cyclictest0-21swapper19:46:260
273229910626253389,52807cyclictest0-21swapper19:31:120
273229910624853409,52748cyclictest0-21swapper00:17:540
273229910619053457,52733cyclictest0-21swapper21:07:290
273229910618953458,52731cyclictest0-21swapper21:01:280
273229910618553415,52770cyclictest0-21swapper20:45:030
273229910617153488,52592cyclictest0-21swapper23:50:060
273229910615453440,52714cyclictest0-21swapper20:23:270
273229910614953434,52715cyclictest0-21swapper22:45:580
273229910614153441,52700cyclictest0-21swapper19:26:400
273229910598653406,52580cyclictest0-21swapper20:56:160
273229910544652993,52451cyclictest22000-21ssh00:31:180
273229910537852932,52444cyclictest20943-21ssh22:58:310
273229910502652905,52119cyclictest0-21swapper21:48:410
27322995382053381,439cyclictest0-21swapper22:53:300
27322995375953423,240cyclictest8689-21ssh23:26:290
27322995373253399,211cyclictest2309-21ssh23:17:570
27322995336326,0cyclictest0-21swapper19:43:250
27322995313226,53106cyclictest0-21swapper20:29:580
27322995305527,53028cyclictest0-21swapper23:48:560
2732299526896,52683cyclictest0-21swapper22:14:290
273229924551084,1245cyclictest31853-21diskmemload21:41:090
273229923151089,1102cyclictest2109-21runrttasks00:01:090
273229922461047,1133cyclictest3950irq/9-acpi23:00:420
273229920751019,931cyclictest9098-21diskmemload22:31:230
273229920671072,928cyclictest132050irq/9-eth021:33:070
273229920431025,965cyclictest9098-21diskmemload23:22:280
273229920251027,961cyclictest30112-21ssh23:57:080
273229920171088,864cyclictest3950irq/9-acpi00:36:400
273229920021017,948cyclictest15581-21ssh23:36:120
273229919721025,853cyclictest0-21swapper20:04:410
273229919351076,766cyclictest3950irq/9-acpi20:30:190
273229919101095,751cyclictest132050irq/9-eth022:02:050
273229918841016,774cyclictest0-21swapper22:25:120
273229918181090,728cyclictest0-21swapper19:24:400
27322991762934,807cyclictest0-21swapper20:42:520
27322991722984,718cyclictest3950irq/9-acpi23:42:440
273229916731088,585cyclictest0-21swapper19:36:430
273229916691067,602cyclictest0-21swapper22:39:460
273229916231081,449cyclictest0-21swapper19:51:470
273229916161095,521cyclictest0-21swapper19:17:380
273229916101093,517cyclictest0-21swapper22:09:570
273229915741112,370cyclictest0-21swapper21:18:530
27322991052593,455cyclictest20604-21hwlatdetect-tra19:14:070
1471522340,2sleep014714-21hwlatdetect-tra19:09:180
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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