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2023-06-02 - 21:05

x86 Intel Celeron M @1600 MHz, Linux 5.4.74-rt41 (Profile)

Latency plot of system in rack #6, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6.osadl.org (updated Fri Jun 02, 2023 12:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
101169910704353410,53541cyclictest0-21swapper09:10:290
101169910703953416,53532cyclictest0-21swapper11:00:310
101169910678353459,53231cyclictest0-21swapper10:48:380
101169910672853398,53330cyclictest0-21swapper09:56:230
101169910666353394,53206cyclictest3950irq/9-acpi10:02:540
101169910658053445,53071cyclictest3950irq/9-acpi11:57:480
101169910655853470,53088cyclictest0-21swapper07:46:450
101169910654553414,53040cyclictest0-21swapper11:29:390
101169910652253390,53132cyclictest0-21swapper07:43:540
101169910650153469,53032cyclictest0-21swapper09:45:500
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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