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2024-09-11 - 15:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Wed Sep 11, 2024 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
38019910681553400,53319cyclictest2749-21gconfd-207:53:350
38019910678153431,53350cyclictest0-21swapper12:16:510
38019910672553448,53186cyclictest24401-21kworker/0:208:28:350
38019910671953431,53288cyclictest0-21swapper11:45:520
38019910670853432,53180cyclictest2103-21runrttasks07:42:020
38019910667453462,53212cyclictest0-21swapper08:43:390
38019910666953398,53271cyclictest0-21swapper07:27:370
38019910665353469,53184cyclictest0-21swapper10:23:180
38019910665353467,53186cyclictest0-21swapper07:47:430
38019910662553397,53138cyclictest9-21ksoftirqd/007:35:500
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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