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2022-07-01 - 01:03

x86 Intel Celeron M @1600 MHz, Linux 5.4.74-rt41 (Profile)

Latency plot of system in rack #6, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6.osadl.org (updated Thu Jun 30, 2022 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4704991304878,423cyclictest1724-21hald10:16:370
4704991255612,15cyclictest0-21swapper10:22:280
4704991251606,643cyclictest0-21swapper12:21:120
4704991249616,631cyclictest0-21swapper11:37:300
4704991248620,626cyclictest0-21swapper07:49:340
4704991247620,625cyclictest0-21swapper07:10:130
4704991246618,626cyclictest0-21swapper08:19:430
4704991243618,623cyclictest0-21swapper07:58:470
4704991243617,624cyclictest0-21swapper08:49:410
4704991241613,626cyclictest0-21swapper09:51:490
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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