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2024-04-19 - 14:46
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Fri Apr 19, 2024 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
195659910679153396,53300cyclictest269952sleep023:52:270
195659910677453440,53271cyclictest9-21ksoftirqd/022:00:050
195659910661553478,53137cyclictest0-21swapper19:39:140
195659910661553437,53178cyclictest0-21swapper20:38:410
195659910660453258,53332cyclictest6164-21runrttasks00:08:320
195659910658653409,53177cyclictest0-21swapper20:56:460
195659910658353390,53128cyclictest0-21swapper22:49:290
195659910653453460,53074cyclictest0-21swapper23:47:150
195659910652253438,53084cyclictest0-21swapper00:38:000
195659910651453407,53107cyclictest0-21swapper22:43:070
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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