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2025-07-12 - 13:02
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Sat Jul 12, 2025 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
160429910683153426,53341cyclictest3950irq/9-acpi23:17:080
160429910679453415,53284cyclictest2114-21munin-node21:34:180
160429910679153482,53244cyclictest9-21ksoftirqd/022:18:310
160429910678853477,53246cyclictest9-21ksoftirqd/023:31:320
160429910676253406,53292cyclictest11-21rcu_preempt00:06:520
160429910671253473,53239cyclictest0-21swapper20:27:490
160429910671253469,53243cyclictest0-21swapper23:06:450
160429910655453391,53098cyclictest0-21swapper00:32:590
160429910652553441,53084cyclictest0-21swapper21:04:490
160429910647653450,53026cyclictest0-21swapper21:48:120
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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