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2023-02-07 - 19:38

x86 Intel Celeron M @1600 MHz, Linux 5.4.74-rt41 (Profile)

Latency plot of system in rack #6, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6.osadl.org (updated Tue Feb 07, 2023 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2497199530518,53042cyclictest0-21swapper08:03:360
249719920281425,600cyclictest1724-21hald10:33:500
24971991257624,631cyclictest0-21swapper08:15:500
24971991248620,626cyclictest0-21swapper07:25:450
24971991243617,624cyclictest0-21swapper11:32:260
24971991243609,632cyclictest0-21swapper10:12:530
24971991242610,629cyclictest0-21swapper08:23:320
24971991240612,626cyclictest0-21swapper07:55:540
24971991239604,633cyclictest0-21swapper10:08:120
24971991237625,608cyclictest6239-21ssh12:08:070
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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