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2023-04-01 - 22:04

x86 Intel Celeron M @1600 MHz, Linux 5.4.74-rt41 (Profile)

Latency plot of system in rack #6, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 100, highest latencies:
System rack6slot6.osadl.org (updated Sat Apr 01, 2023 12:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
7929910509953022,52075cyclictest0-21swapper12:19:000
7929910504252976,52065cyclictest0-21swapper08:36:060
792991262621,639cyclictest0-21swapper09:26:200
792991247620,625cyclictest0-21swapper07:25:050
792991245619,624cyclictest0-21swapper07:48:420
792991245618,625cyclictest0-21swapper08:14:300
792991244614,628cyclictest0-21swapper11:16:220
792991242610,630cyclictest0-21swapper07:52:030
792991240611,627cyclictest0-21swapper08:27:530
792991238612,624cyclictest0-21swapper09:07:550
792991234609,623cyclictest0-21swapper08:47:590
792991231607,622cyclictest0-21swapper09:35:130
792991230602,626cyclictest0-21swapper10:13:040
792991227602,623cyclictest0-21swapper07:18:230
792991226601,623cyclictest0-21swapper09:44:150
792991226597,627cyclictest0-21swapper11:35:170
792991225593,630cyclictest0-21swapper07:41:500
792991224585,637cyclictest0-21swapper11:10:400
792991222595,625cyclictest0-21swapper12:07:570
792991219594,623cyclictest0-21swapper08:04:470
792991217587,627cyclictest0-21swapper10:41:320
792991216596,618cyclictest0-21swapper09:16:480
792991216584,630cyclictest0-21swapper09:04:340
792991215584,629cyclictest0-21swapper09:31:520
792991213590,621cyclictest0-21swapper09:21:090
792991212579,631cyclictest0-21swapper07:37:490
792991210586,621cyclictest0-21swapper08:53:210
792991208585,621cyclictest0-21swapper11:04:590
792991208582,624cyclictest0-21swapper12:04:260
792991203578,623cyclictest0-21swapper07:33:180
792991194582,611cyclictest0-21swapper11:09:500
792991194565,626cyclictest0-21swapper11:22:240
792991193554,637cyclictest0-21swapper11:59:240
792991191565,624cyclictest0-21swapper10:46:230
792991189558,629cyclictest0-21swapper10:38:210
792991186555,629cyclictest0-21swapper12:39:560
792991181563,616cyclictest0-21swapper12:26:020
792991179543,634cyclictest0-21swapper07:56:040
792991178619,556cyclictest19904-21ssh10:57:470
792991178615,559cyclictest24878-21irqstats11:40:290
792991173552,619cyclictest0-21swapper08:23:520
792991173541,630cyclictest0-21swapper08:17:100
792991170543,625cyclictest0-21swapper07:13:120
792991169530,637cyclictest0-21swapper11:51:220
792991164536,626cyclictest0-21swapper10:54:060
792991161534,625cyclictest0-21swapper09:58:200
792991159608,547cyclictest2093-21runrttasks11:46:210
792991156520,634cyclictest0-21swapper11:33:370
792991155535,618cyclictest0-21swapper12:31:540
792991152605,544cyclictest30552-21ssh12:24:120
792991138599,536cyclictest5362-21smartctl08:30:540
792991134509,623cyclictest0-21swapper10:03:410
792991134506,626cyclictest0-21swapper10:16:550
792991126500,624cyclictest0-21swapper08:55:210
792991124500,622cyclictest0-21swapper08:43:380
792991118490,626cyclictest0-21swapper09:48:170
792991115487,626cyclictest0-21swapper10:29:080
792991096473,621cyclictest0-21swapper08:09:280
792991089460,627cyclictest0-21swapper10:20:160
792991085458,625cyclictest0-21swapper10:33:400
792991084458,623cyclictest0-21swapper09:11:460
792991063562,498cyclictest9251-21ssh10:09:030
79299939598,338cyclictest18325-21df12:10:180
79299904580,321cyclictest26187-21ssh09:50:570
79299862595,264cyclictest22547-21diskmemload11:29:560
79299701581,118cyclictest7066-21kworker/u2:007:22:550
3241227557,13sleep00-21swapper07:06:390
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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