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2022-08-19 - 12:58

x86 Intel Celeron M @1600 MHz, Linux 5.4.74-rt41 (Profile)

Latency plot of system in rack #6, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 100, highest latencies:
System rack6slot6.osadl.org (updated Fri Aug 19, 2022 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
8880991259626,631cyclictest0-21swapper20:15:520
8880991258619,637cyclictest0-21swapper22:34:220
8880991256624,630cyclictest0-21swapper23:57:160
8880991249619,628cyclictest0-21swapper00:06:490
8880991247619,626cyclictest0-21swapper21:44:180
8880991243613,628cyclictest0-21swapper19:42:430
8880991241614,625cyclictest0-21swapper23:30:080
8880991241613,626cyclictest0-21swapper00:11:500
8880991240615,623cyclictest0-21swapper20:55:040
8880991240607,631cyclictest0-21swapper20:09:100
8880991236607,627cyclictest0-21swapper22:19:180
8880991236601,632cyclictest0-21swapper21:55:110
8880991235612,621cyclictest0-21swapper23:07:520
8880991235610,623cyclictest0-21swapper20:27:260
8880991234610,622cyclictest0-21swapper00:02:480
8880991234608,624cyclictest0-21swapper20:48:120
8880991231611,618cyclictest0-21swapper00:21:530
8880991229610,617cyclictest0-21swapper22:04:540
8880991229589,638cyclictest0-21swapper00:36:470
8880991227601,624cyclictest0-21swapper19:28:290
8880991226601,623cyclictest0-21swapper23:21:160
8880991224601,621cyclictest0-21swapper21:29:440
8880991224596,626cyclictest0-21swapper22:12:560
8880991221598,621cyclictest0-21swapper19:21:570
8880991221591,628cyclictest0-21swapper20:12:410
8880991220590,628cyclictest0-21swapper19:30:190
8880991218623,592cyclictest12701-21ls22:55:280
8880991215591,622cyclictest0-21swapper19:35:310
8880991213584,627cyclictest0-21swapper20:34:580
8880991212586,624cyclictest0-21swapper00:17:520
8880991209619,588cyclictest30088-21ssh23:18:150
8880991209619,587cyclictest22851-21ssh22:27:400
8880991208584,622cyclictest0-21swapper19:46:240
8880991208567,639cyclictest0-21swapper23:49:340
8880991206583,621cyclictest0-21swapper21:38:460
8880991204583,619cyclictest0-21swapper00:32:160
8880991201611,587cyclictest11299-21iostat_ios23:35:200
8880991201573,626cyclictest0-21swapper23:03:410
8880991200568,630cyclictest0-21swapper22:41:540
8880991199571,626cyclictest0-21swapper20:22:540
8880991198568,628cyclictest0-21swapper23:51:040
8880991195570,623cyclictest0-21swapper21:04:060
8880991194562,630cyclictest0-21swapper21:49:090
8880991188560,626cyclictest0-21swapper22:22:190
8880991183560,621cyclictest0-21swapper19:11:540
8880991182556,624cyclictest0-21swapper21:52:200
8880991180552,626cyclictest0-21swapper21:19:110
8880991180552,626cyclictest0-21swapper20:01:080
8880991180551,627cyclictest0-21swapper22:35:430
8880991174542,630cyclictest0-21swapper21:09:180
8880991172546,624cyclictest0-21swapper20:39:590
8880991171550,619cyclictest0-21swapper21:22:210
8880991170547,621cyclictest0-21swapper23:12:530
8880991169545,622cyclictest0-21swapper22:45:560
8880991163540,621cyclictest0-21swapper20:44:410
8880991159532,625cyclictest0-21swapper23:29:280
8880991156532,622cyclictest0-21swapper22:52:070
8880991155535,618cyclictest0-21swapper21:31:240
8880991151530,619cyclictest0-21swapper19:18:060
8880991138512,624cyclictest0-21swapper20:53:330
8880991135580,552cyclictest16072-21ssh23:41:010
8880991129506,621cyclictest0-21swapper21:10:380
8880991125503,620cyclictest0-21swapper00:26:350
8880991118497,619cyclictest0-21swapper19:55:470
8880991111482,627cyclictest0-21swapper19:50:550
8880991102477,623cyclictest0-21swapper22:07:040
8363210765,38sleep02582-21devkit-power-da19:07:550
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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