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2022-10-03 - 04:51

x86 Intel Celeron M @1600 MHz, Linux 5.4.74-rt41 (Profile)

Latency plot of system in rack #6, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 20 highest latencies:
System rack6slot6.osadl.org (updated Mon Oct 03, 2022 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
73739928871770,1114cyclictest2582-21devkit-power-da23:29:120
7373991253622,629cyclictest0-21swapper19:10:370
7373991251622,627cyclictest0-21swapper00:29:090
7373991251618,631cyclictest0-21swapper22:03:570
7373991247620,625cyclictest0-21swapper22:21:120
7373991247619,626cyclictest0-21swapper00:38:420
7373991245618,625cyclictest0-21swapper19:25:210
7373991245611,632cyclictest0-21swapper21:36:290
7373991243618,623cyclictest0-21swapper19:55:000
7373991243604,637cyclictest0-21swapper00:07:330
7373991239611,626cyclictest0-21swapper20:05:530
7373991237615,620cyclictest0-21swapper23:19:490
7373991237605,630cyclictest0-21swapper23:59:400
7373991236611,623cyclictest0-21swapper22:09:490
7373991236610,624cyclictest0-21swapper00:02:210
7373991232607,623cyclictest0-21swapper22:44:490
7373991232601,629cyclictest0-21swapper21:07:010
7373991231603,626cyclictest0-21swapper21:22:350
7373991230607,621cyclictest0-21swapper20:26:490
7373991229602,625cyclictest0-21swapper23:38:140
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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