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2023-03-26 - 11:49

x86 Intel Celeron M @1600 MHz, Linux 5.4.74-rt41 (Profile)

Latency plot of system in rack #6, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of all highest latencies:
System rack6slot6.osadl.org (updated Sun Mar 26, 2023 00:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
208639910564852967,52679cyclictest16548-21ssh22:28:390
208639910510652990,52113cyclictest28853-21find00:31:140
20863991251608,640cyclictest0-21swapper21:42:360
20863991250621,627cyclictest0-21swapper21:37:240
20863991247619,626cyclictest0-21swapper00:26:530
20863991244609,633cyclictest0-21swapper19:35:090
20863991240607,631cyclictest0-21swapper21:56:100
20863991240601,636cyclictest0-21swapper22:41:230
20863991236606,628cyclictest0-21swapper00:05:070
20863991235610,623cyclictest0-21swapper19:33:490
20863991235609,624cyclictest0-21swapper20:29:450
20863991235608,625cyclictest0-21swapper23:45:310
20863991234609,622cyclictest0-21swapper19:21:350
20863991233609,621cyclictest0-21swapper20:00:160
20863991231609,620cyclictest0-21swapper23:07:500
20863991229595,632cyclictest0-21swapper00:24:520
20863991228598,628cyclictest0-21swapper20:44:590
20863991227598,627cyclictest0-21swapper20:07:580
20863991225596,627cyclictest0-21swapper20:52:210
20863991224589,633cyclictest0-21swapper20:46:190
20863991223596,625cyclictest0-21swapper21:19:490
20863991220595,623cyclictest0-21swapper23:56:540
20863991219598,619cyclictest0-21swapper20:22:330
20863991219590,627cyclictest0-21swapper19:19:450
20863991218598,618cyclictest0-21swapper23:54:540
20863991215589,623cyclictest0-21swapper22:08:230
20863991214588,623cyclictest0-21swapper21:49:480
20863991214584,628cyclictest0-21swapper22:57:570
20863991213588,623cyclictest0-21swapper23:35:180
20863991213587,624cyclictest0-21swapper23:16:330
20863991212583,627cyclictest0-21swapper22:04:420
20863991211579,630cyclictest0-21swapper21:07:560
20863991209582,625cyclictest0-21swapper23:22:340
20863991207572,633cyclictest0-21swapper00:01:360
20863991205571,632cyclictest0-21swapper20:36:070
20863991202578,622cyclictest0-21swapper21:34:230
20863991202578,622cyclictest0-21swapper00:13:490
20863991197568,627cyclictest0-21swapper22:32:100
20863991193566,625cyclictest0-21swapper00:16:200
20863991187559,626cyclictest0-21swapper22:49:450
20863991180547,631cyclictest0-21swapper22:19:060
20863991170546,622cyclictest0-21swapper19:49:130
20863991166536,628cyclictest0-21swapper19:43:510
20863991164536,626cyclictest0-21swapper20:12:100
20863991150521,627cyclictest0-21swapper22:20:270
20863991149524,623cyclictest0-21swapper19:28:070
20863991144521,621cyclictest0-21swapper20:59:230
20863991143518,623cyclictest0-21swapper20:19:020
20863991141514,625cyclictest0-21swapper22:12:240
20863991139611,525cyclictest27162-21runrttasks20:34:060
20863991138507,629cyclictest0-21swapper00:36:560
20863991137518,617cyclictest0-21swapper21:14:070
20863991135502,631cyclictest0-21swapper22:36:410
20863991121489,630cyclictest0-21swapper21:26:110
20863991108481,625cyclictest0-21swapper23:03:190
20863991107474,631cyclictest0-21swapper21:01:540
20863991104476,626cyclictest0-21swapper21:24:200
2086399971527,441cyclictest3791-21ls22:50:250
2086399965625,337cyclictest3178-21ssh23:26:050
2086399951617,331cyclictest10073-21ps19:55:350
2086399899493,404cyclictest16273-21ssh21:51:180
2086399894590,301cyclictest17893-21ssh23:42:500
2086399732607,122cyclictest22183-21abrt-action-sav23:11:110
2086399705595,107cyclictest10147-21ssh23:34:380
2086399634617,16cyclictest0-21swapper19:11:220
2086399633617,15cyclictest20862-21cyclictest19:50:130
2044427154,13sleep00-21swapper19:08:300
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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