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2024-02-27 - 02:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of all highest latencies:
System rack6slot6.osadl.org (updated Mon Feb 26, 2024 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
211699910674253464,53278cyclictest0-21swapper07:35:270
211699910673653472,53264cyclictest0-21swapper10:41:200
211699910670853422,53195cyclictest0-21swapper11:42:280
211699910669453456,53238cyclictest0-21swapper12:16:380
211699910665653436,53220cyclictest0-21swapper11:01:060
211699910662653405,53221cyclictest0-21swapper10:51:530
211699910662053415,53205cyclictest0-21swapper07:26:340
211699910655353390,53098cyclictest0-21swapper07:20:230
211699910650953477,53032cyclictest0-21swapper12:38:140
211699910650453458,53046cyclictest0-21swapper12:23:300
211699910650153430,53071cyclictest0-21swapper07:42:490
211699910649753428,53069cyclictest0-21swapper07:54:320
211699910649653476,53020cyclictest0-21swapper07:31:560
211699910649453466,53028cyclictest0-21swapper09:00:010
211699910649353469,53024cyclictest0-21swapper09:58:580
211699910648653407,53079cyclictest0-21swapper08:40:060
211699910648153401,53080cyclictest0-21swapper10:17:540
211699910647653448,53028cyclictest0-21swapper12:33:130
211699910647153413,53058cyclictest0-21swapper11:26:230
211699910646753454,53013cyclictest0-21swapper09:52:570
211699910641053426,52984cyclictest0-21swapper11:52:010
211699910631053475,52835cyclictest0-21swapper09:08:540
211699910628953387,52811cyclictest0-21swapper07:16:420
211699910618053453,52727cyclictest0-21swapper07:10:000
211699910616553405,52760cyclictest0-21swapper08:35:440
211699910616453402,52762cyclictest0-21swapper07:50:510
211699910616353442,52721cyclictest0-21swapper12:01:540
211699910615853398,52760cyclictest0-21swapper08:53:090
211699910615753434,52723cyclictest0-21swapper08:28:120
211699910615153429,52722cyclictest0-21swapper08:32:330
211699910614353395,52748cyclictest0-21swapper08:47:380
211699910586253054,52802cyclictest5652-21ssh12:06:550
211699910543453180,52254cyclictest0-21swapper11:45:390
211699910529253070,52219cyclictest0-21swapper11:38:270
21169995356125,0cyclictest0-21swapper12:26:510
21169995350424,0cyclictest0-21swapper12:14:070
21169995330926,106cyclictest0-21swapper09:18:060
21169995322932,53130cyclictest0-21swapper09:26:490
21169995314724,53123cyclictest0-21swapper08:21:000
21169995308826,53062cyclictest0-21swapper10:35:390
21169995308027,53053cyclictest0-21swapper08:10:570
21169995307226,53046cyclictest0-21swapper10:33:380
211699924261100,1260cyclictest3950irq/9-acpi09:46:040
211699922791093,1060cyclictest12167-21ssh10:45:520
211699921341027,983cyclictest24010-21diskmemload09:33:410
211699921151098,918cyclictest11634-21ssh10:00:090
211699921121004,984cyclictest26578-21ssh09:36:320
211699920941037,963cyclictest3950irq/9-acpi10:26:360
211699920531073,855cyclictest30339-21ssh11:56:020
211699920141002,978cyclictest0-21swapper09:09:540
21169992006977,991cyclictest4978-21sh11:20:420
211699919991006,901cyclictest3950irq/9-acpi11:17:410
211699919571009,914cyclictest0-21swapper10:22:550
211699919461078,802cyclictest2526050irq/9-eth011:13:200
21169991925939,949cyclictest28310-21ssh11:09:180
21169991859919,906cyclictest3950irq/9-acpi11:29:540
21169991828991,800cyclictest19327-21ssh10:55:450
211699918181052,641cyclictest20888-21ssh10:14:130
211699917571098,659cyclictest0-21swapper08:59:010
211699916831095,588cyclictest0-21swapper08:18:390
211699916621085,577cyclictest0-21swapper07:44:190
211699916081095,449cyclictest9-21ksoftirqd/007:59:340
21169991593974,582cyclictest15865-21ssh09:21:580
211699915521032,520cyclictest0-21swapper10:08:310
211699915331013,426cyclictest0-21swapper08:05:460
211699914851093,392cyclictest0-21swapper09:44:040
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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