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2024-03-02 - 00:21
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the highest latencies:
System rack6slot6.osadl.org (updated Fri Mar 01, 2024 12:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
267589910703953415,53533cyclictest0-21swapper10:49:220
267589910670553461,53244cyclictest0-21swapper07:57:220
267589910658053416,53100cyclictest9-21ksoftirqd/010:58:540
267589910657353388,53119cyclictest0-21swapper11:47:080
267589910652553454,53071cyclictest0-21swapper07:14:300
267589910652453477,53047cyclictest0-21swapper10:18:130
267589910651753450,53067cyclictest0-21swapper08:55:090
267589910647453454,53020cyclictest0-21swapper11:10:480
267589910647253413,53059cyclictest0-21swapper07:20:010
267589910646753456,53011cyclictest0-21swapper12:24:390
267589910646253449,53013cyclictest0-21swapper10:48:310
267589910645153444,53007cyclictest0-21swapper11:16:400
267589910642153430,52991cyclictest0-21swapper09:40:220
267589910641853455,52873cyclictest11-21rcu_preempt11:58:220
267589910641753432,52985cyclictest0-21swapper11:31:240
267589910620253468,52734cyclictest0-21swapper07:33:150
267589910619553432,52763cyclictest0-21swapper09:00:300
267589910619053462,52728cyclictest0-21swapper08:33:230
267589910618053474,52706cyclictest0-21swapper08:26:310
267589910616653396,52770cyclictest0-21swapper07:14:000
267589910616253447,52715cyclictest0-21swapper08:17:180
267589910616153444,52717cyclictest0-21swapper08:12:470
267589910615453444,52710cyclictest0-21swapper07:41:070
267589910614153439,52702cyclictest0-21swapper08:04:240
267589910614153433,52708cyclictest0-21swapper10:05:490
267589910610453415,52689cyclictest0-21swapper08:45:560
267589910585853282,52576cyclictest0-21swapper10:36:480
267589910547252924,52545cyclictest15041-21ssh09:14:140
267589910536453068,52292cyclictest28938-21ssh09:33:500
267589910516053060,52098cyclictest0-21swapper12:00:220
267589910514453039,52101cyclictest0-21swapper09:50:150
26758995361025,53463cyclictest0-21swapper11:27:530
26758995348827,384cyclictest0-21swapper11:07:170
26758995342927,53308cyclictest0-21swapper08:00:230
26758995329724,0cyclictest0-21swapper08:22:090
26758995325025,0cyclictest0-21swapper09:06:320
26758995314424,53120cyclictest0-21swapper12:34:120
26758995308225,52964cyclictest0-21swapper08:51:580
26758995305924,53035cyclictest0-21swapper08:39:140
267589925011056,1321cyclictest29176-21ssh12:37:430
267589924871106,1381cyclictest11762-21ssh10:40:090
267589923941014,1254cyclictest10842-21diskmemload12:11:050
267589923221059,1138cyclictest27237-21ssh11:02:560
267589923041081,1099cyclictest2109-21runrttasks07:35:360
267589922141021,1066cyclictest13946-21ssh09:58:170
267589922121082,1036cyclictest2526050irq/9-eth012:15:260
267589922081046,1125cyclictest5362-21diskmemload09:45:030
267589922011044,1118cyclictest11559-21diskmemload11:52:300
267589921551058,1097cyclictest0-21swapper10:00:180
267589921171003,1077cyclictest32383-21ssh09:38:410
267589920711026,1011cyclictest0-21swapper11:23:420
267589920051010,974cyclictest0-21swapper12:08:240
267589920021066,870cyclictest2526050irq/9-eth009:24:370
267589919751027,855cyclictest0-21swapper10:09:200
267589919681024,909cyclictest0-21swapper11:40:360
267589919661023,849cyclictest0-21swapper07:50:500
267589919201045,781cyclictest0-21swapper07:28:440
267589919131053,793cyclictest26757-21cyclictest07:49:100
26758991900997,867cyclictest18737-21ssh09:19:260
267589918371040,797cyclictest0-21swapper10:25:050
267589918301064,672cyclictest0-21swapper10:21:340
26758991794944,817cyclictest19133-21ssh11:37:150
267589917101080,630cyclictest0-21swapper08:42:550
267589915251009,422cyclictest0-21swapper10:33:070
26758991459975,448cyclictest18036-21ssh12:21:280
267589913891068,321cyclictest0-21swapper09:18:350
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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