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2022-08-13 - 02:21

x86 Intel Pentium Dual-Core T4500 @2300 MHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #6, slot #7
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 376 highest latencies:
System rack6slot7.osadl.org (updated Fri Aug 12, 2022 12:43:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
272442790,0sleep00-21swapper/009:09:330
35412740,0sleep00-21swapper/010:01:320
5554997221,50cyclictest13505-21ssh10:12:140
5554997221,50cyclictest0-21swapper/011:06:150
5554997051,18cyclictest0-21swapper/011:19:150
5554996651,13cyclictest1318-21NetworkManager10:05:170
5564996561,3cyclictest27573-21kworker/u4:109:20:151
5554996555,9cyclictest3420-21kworker/u4:210:18:130
5554996533,31cyclictest0-21swapper/007:25:140
555499653,61cyclictest0-21swapper/008:53:160
5564996461,2cyclictest13493-21kworker/u4:208:46:141
5554996460,3cyclictest0-21swapper/010:54:140
5554996454,9cyclictest26264-21kworker/u4:207:08:150
5554996454,9cyclictest24371-21kworker/u4:012:30:140
5554996454,9cyclictest18075-21kworker/u4:208:04:150
5554996454,9cyclictest16666-21kworker/u4:011:39:140
5554996453,10cyclictest26331-21kworker/u4:107:57:170
5554996452,11cyclictest0-21swapper/008:12:150
5554996432,31cyclictest0-21swapper/009:52:160
5554996432,31cyclictest0-21swapper/007:12:160
555499643,60cyclictest10031-21ssh10:49:130
555499643,60cyclictest0-21swapper/012:14:130
555499643,60cyclictest0-21swapper/012:06:160
555499643,60cyclictest0-21swapper/012:00:140
555499643,60cyclictest0-21swapper/011:11:140
555499643,60cyclictest0-21swapper/008:58:150
555499643,60cyclictest0-21swapper/008:42:140
555499643,60cyclictest0-21swapper/007:27:140
5554996423,40cyclictest0-21swapper/011:36:150
5554996422,41cyclictest0-21swapper/011:13:140
555499642,61cyclictest0-21swapper/011:51:140
555499642,61cyclictest0-21swapper/010:58:130
216982640,0sleep10-21swapper/108:57:031
5564996361,1cyclictest833-21kworker/u4:208:22:151
5564996361,1cyclictest30412-21kworker/u4:110:58:151
5564996360,2cyclictest30589-21kworker/u4:211:16:131
5564996360,2cyclictest2016-21kworker/u4:212:35:151
5564996360,2cyclictest11298-21kworker/u4:211:03:161
5564996360,2cyclictest0-21swapper/109:48:161
5554996358,3cyclictest0-21swapper/012:18:150
5554996354,8cyclictest833-21kworker/u4:208:19:160
5554996354,8cyclictest11270-21kworker/u4:009:12:130
555499633,59cyclictest0-21swapper/010:39:140
555499632,60cyclictest0-21swapper/010:29:130
555499632,60cyclictest0-21swapper/009:24:150
555499632,60cyclictest0-21swapper/009:05:150
555499632,60cyclictest0-21swapper/008:32:130
555499632,60cyclictest0-21swapper/008:28:160
555499632,60cyclictest0-21swapper/007:43:150
5554996312,50cyclictest0-21swapper/009:49:140
5554996312,50cyclictest0-21swapper/008:25:140
5554996312,50cyclictest0-21swapper/007:19:160
5564996260,1cyclictest28564-21kworker/u4:008:02:141
5564996259,2cyclictest30412-21kworker/u4:110:56:151
5564996259,2cyclictest27573-21kworker/u4:109:38:171
5564996259,2cyclictest23372-21kworker/u4:010:31:131
5564996258,3cyclictest0-21swapper/107:47:141
5554996257,3cyclictest24279-21diskmemload11:56:140
5564996159,1cyclictest0-21swapper/110:46:161
5564996158,2cyclictest30412-21kworker/u4:110:38:151
5564996158,2cyclictest24042-21kworker/u4:209:08:151
5564996158,2cyclictest0-21swapper/109:16:151
5564996058,1cyclictest20971-21kworker/u4:211:55:141
5564996058,1cyclictest0-21swapper/109:30:161
5564996057,2cyclictest27573-21kworker/u4:109:22:151
5564996057,2cyclictest26361-21kworker/u4:011:25:151
5564996057,2cyclictest0-21swapper/110:04:131
5564996057,2cyclictest0-21swapper/108:09:151
5554996051,8cyclictest0-21swapper/009:38:130
5554996051,8cyclictest0-21swapper/008:07:130
5564995957,1cyclictest23372-21kworker/u4:010:33:161
5564995957,1cyclictest15782-21kworker/u4:009:54:141
5564995957,1cyclictest13734-21kworker/u4:207:25:171
5564995955,3cyclictest3420-21kworker/u4:210:10:161
5554995953,4cyclictest0-21swapper/011:26:150
5564995856,1cyclictest11298-21kworker/u4:211:08:141
5564995855,2cyclictest7044-21kworker/u4:010:51:161
5564995855,2cyclictest29974-21kworker/u4:112:11:121
5564995855,2cyclictest18784-21kworker/u4:110:25:161
5564995855,2cyclictest18075-21kworker/u4:207:39:171
5564995854,3cyclictest16461-21kworker/u4:112:21:131
5554995854,3cyclictest0-21swapper/012:35:140
5554995854,3cyclictest0-21swapper/012:24:120
5554995853,4cyclictest1308-21dbus-daemon09:17:170
5564995755,1cyclictest833-21kworker/u4:208:13:151
5564995755,1cyclictest7488-21kworker/u4:110:12:151
5564995755,1cyclictest30589-21kworker/u4:211:19:131
5564995755,1cyclictest2436-21kworker/u4:111:44:151
5564995755,1cyclictest20971-21kworker/u4:211:50:161
5564995755,1cyclictest2016-21kworker/u4:212:31:141
5564995755,1cyclictest2016-21kworker/u4:212:04:141
5564995755,1cyclictest16461-21kworker/u4:112:25:131
5564995755,1cyclictest15782-21kworker/u4:009:45:161
5564995755,1cyclictest13527-21kworker/u4:010:17:151
5564995754,2cyclictest833-21kworker/u4:208:17:171
5564995754,2cyclictest2436-21kworker/u4:111:32:161
5564995754,2cyclictest17838-21kworker/u4:108:53:171
5554995755,1cyclictest27573-21kworker/u4:109:27:130
5554995755,1cyclictest18075-21kworker/u4:207:47:170
5554995753,3cyclictest0-21swapper/009:43:150
5554995752,4cyclictest0-21swapper/010:07:130
5554995752,4cyclictest0-21swapper/007:52:130
5564995654,1cyclictest8677-21kworker/u4:211:37:161
5564995654,1cyclictest6880-21kworker/u4:108:39:161
5564995654,1cyclictest5031-21kworker/u4:107:12:151
5564995654,1cyclictest29974-21kworker/u4:111:57:161
5564995654,1cyclictest27573-21kworker/u4:109:33:151
5564995654,1cyclictest26361-21kworker/u4:011:27:161
5564995654,1cyclictest26331-21kworker/u4:107:57:151
5564995654,1cyclictest2016-21kworker/u4:212:12:161
5564995653,2cyclictest5031-21kworker/u4:107:30:171
5554995654,1cyclictest13493-21kworker/u4:208:49:150
5564995553,1cyclictest6880-21kworker/u4:108:32:151
5564995553,1cyclictest5031-21kworker/u4:107:21:161
5564995553,1cyclictest18075-21kworker/u4:207:44:151
5554995553,1cyclictest6880-21kworker/u4:108:41:160
5554995553,1cyclictest30412-21kworker/u4:110:43:160
5554995551,3cyclictest0-21swapper/011:44:150
5554995551,3cyclictest0-21swapper/007:37:170
5564995452,1cyclictest15782-21kworker/u4:009:57:141
5564995451,2cyclictest0-21swapper/107:10:161
5564995450,3cyclictest1308-21dbus-daemon08:48:171
5554995448,4cyclictest10090-21rm11:30:130
5564995350,2cyclictest1318-21NetworkManager08:27:171
5564995149,1cyclictest0-21swapper/109:03:141
5564995148,2cyclictest0-21swapper/107:52:151
5554995147,3cyclictest0-21swapper/012:07:160
5554994932,4cyclictest14820-21ssh09:34:130
5554994932,3cyclictest0-21swapper/010:36:160
5554994743,3cyclictest0-21swapper/010:26:150
530624231,7sleep00-21swapper/007:05:160
5564993937,1cyclictest18075-21kworker/u4:207:35:171
5554993735,1cyclictest5031-21kworker/u4:107:32:150
524622922,3sleep10-21swapper/107:04:391
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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