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2023-06-06 - 05:27

x86 Intel Pentium Dual-Core T4500 @2300 MHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #6, slot #7
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack6slot7.osadl.org (updated Tue Jun 06, 2023 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
308492780,1sleep01378-21avahi-daemon22:52:320
171302780,1sleep01378-21avahi-daemon23:57:330
218602750,0sleep01378-21avahi-daemon18:52:290
218602750,0sleep01378-21avahi-daemon18:52:290
230612740,0sleep10-21swapper/120:22:271
286792700,1sleep00-21swapper/021:27:040
264802680,1sleep026484-21latency_hist20:32:120
21086996660,5cyclictest25154-21diskstats19:02:290
2108699663,61cyclictest14775-21munin-node22:32:280
2108799654,60cyclictest1378-21avahi-daemon20:19:321
2108799653,61cyclictest1378-21avahi-daemon23:46:281
2108799653,61cyclictest1378-21avahi-daemon23:25:281
2108799653,61cyclictest1378-21avahi-daemon22:09:301
2108799653,61cyclictest1378-21avahi-daemon21:32:291
2108799653,61cyclictest1378-21avahi-daemon21:23:281
2108799653,61cyclictest1378-21avahi-daemon20:11:291
2108799653,61cyclictest1378-21avahi-daemon20:06:301
2108799653,61cyclictest1378-21avahi-daemon00:00:281
21086996561,3cyclictest23246-21kworker/u4:123:28:280
21086996560,4cyclictest27001-21grep22:47:310
2108699654,60cyclictest1378-21avahi-daemon20:52:310
196826532,31sleep11378-21avahi-daemon22:15:311
21087996461,2cyclictest1378-21avahi-daemon19:07:321
21087996432,30cyclictest1378-21avahi-daemon00:13:281
2108799643,60cyclictest1378-21avahi-daemon22:29:281
2108799643,60cyclictest1378-21avahi-daemon20:33:301
2108799643,60cyclictest1378-21avahi-daemon19:19:301
2108799643,60cyclictest1378-21avahi-daemon19:13:291
21087996422,41cyclictest1378-21avahi-daemon20:56:321
2108799642,61cyclictest1378-21avahi-daemon23:38:291
2108799642,61cyclictest1378-21avahi-daemon22:54:281
2108799642,61cyclictest1378-21avahi-daemon21:40:291
2108799642,61cyclictest1378-21avahi-daemon19:42:321
21087996413,50cyclictest1378-21avahi-daemon21:20:321
21087996412,50cyclictest1378-21avahi-daemon19:47:321
21086996460,3cyclictest1378-21avahi-daemon22:16:290
21086996460,3cyclictest1378-21avahi-daemon22:10:300
21086996459,4cyclictest1378-21avahi-daemon21:14:320
21086996459,4cyclictest1378-21avahi-daemon00:06:280
2108699643,60cyclictest1378-21avahi-daemon21:48:310
2108699643,60cyclictest1378-21avahi-daemon20:45:280
2108699643,60cyclictest0-21swapper/021:58:290
21087996361,1cyclictest5454-21kworker/u4:022:36:291
21087996361,1cyclictest3398-21kworker/u4:220:12:291
21087996361,1cyclictest14960-21kworker/u4:022:03:311
21087996361,1cyclictest13898-21kworker/u4:223:18:291
21087996351,11cyclictest1378-21avahi-daemon19:41:311
21087996351,11cyclictest1378-21avahi-daemon19:23:301
21087996341,21cyclictest1378-21avahi-daemon22:20:291
21087996341,21cyclictest1378-21avahi-daemon21:30:321
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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