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2022-12-09 - 18:02

x86 Intel Pentium Dual-Core T4500 @2300 MHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #6, slot #7
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of all highest latencies:
System rack6slot7.osadl.org (updated Thu Dec 08, 2022 12:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
28512830,1sleep00-21swapper/010:28:320
28250996661,4cyclictest0-21swapper/107:02:381
2825099664,60cyclictest14664-21diskmemload11:40:381
2825099663,61cyclictest1294-21ssh11:38:371
2825099653,61cyclictest0-21swapper/107:19:391
2824499653,61cyclictest0-21swapper/011:35:360
2824499653,61cyclictest0-21swapper/008:35:370
2824499653,61cyclictest0-21swapper/007:24:370
296992640,0sleep00-21swapper/006:54:540
28250996461,2cyclictest17400-21kworker/u4:109:37:371
28250996460,3cyclictest14664-21diskmemload09:41:391
28250996460,3cyclictest0-21swapper/109:45:381
28250996432,31cyclictest0-21swapper/110:15:351
28250996432,31cyclictest0-21swapper/110:09:371
28250996432,31cyclictest0-21swapper/108:47:361
2825099643,60cyclictest0-21swapper/112:15:361
2825099643,60cyclictest0-21swapper/111:19:371
2825099643,60cyclictest0-21swapper/110:07:361
2825099643,60cyclictest0-21swapper/108:57:361
2825099643,60cyclictest0-21swapper/108:31:351
2825099643,60cyclictest0-21swapper/107:54:391
28250996422,41cyclictest0-21swapper/108:37:391
28250996422,41cyclictest0-21swapper/107:14:361
28250996413,50cyclictest0-21swapper/108:52:381
28244996461,2cyclictest0-21swapper/009:39:350
28244996459,3cyclictest3787-21df10:29:370
2824499644,59cyclictest0-21swapper/008:39:380
2824499643,60cyclictest0-21swapper/010:21:380
28244996413,50cyclictest0-21swapper/009:28:370
28250996351,11cyclictest0-21swapper/108:26:391
28250996351,11cyclictest0-21swapper/107:12:381
28250996331,31cyclictest0-21swapper/110:03:351
28250996331,31cyclictest0-21swapper/108:43:371
28250996331,31cyclictest0-21swapper/108:21:381
28250996331,31cyclictest0-21swapper/107:33:371
28250996331,31cyclictest0-21swapper/107:04:361
28250996322,40cyclictest0-21swapper/107:34:381
28250996322,40cyclictest0-21swapper/107:28:361
28250996321,41cyclictest0-21swapper/108:06:381
2825099632,60cyclictest0-21swapper/110:32:351
2825099632,60cyclictest0-21swapper/108:00:351
28250996312,50cyclictest0-21swapper/112:23:361
28250996312,50cyclictest0-21swapper/111:51:351
28250996312,50cyclictest0-21swapper/111:10:361
28250996312,50cyclictest0-21swapper/109:26:381
28244996359,3cyclictest0-21swapper/009:50:360
28244996312,50cyclictest0-21swapper/009:54:360
155762630,0sleep10-21swapper/110:42:121
28250996260,1cyclictest14686-21kworker/u4:111:24:351
28244996260,1cyclictest0-21swapper/011:30:370
28244996260,1cyclictest0-21swapper/009:07:380
28244996260,1cyclictest0-21swapper/008:19:390
28244996260,1cyclictest0-21swapper/007:21:370
28244996260,1cyclictest0-21swapper/007:08:370
28244996251,9cyclictest10578-21ssh11:12:360
28244996251,10cyclictest0-21swapper/011:48:360
28244996250,11cyclictest0-21swapper/010:52:350
28244996241,20cyclictest0-21swapper/010:15:370
28244996241,20cyclictest0-21swapper/010:10:380
28250996156,4cyclictest0-21swapper/112:04:341
28244996159,1cyclictest0-21swapper/010:44:380
28244996159,1cyclictest0-21swapper/007:45:390
28244996158,2cyclictest0-21swapper/009:00:380
28244996158,2cyclictest0-21swapper/007:34:370
28244996150,10cyclictest0-21swapper/012:22:380
28244996150,10cyclictest0-21swapper/009:34:370
28244996150,10cyclictest0-21swapper/009:31:380
28244996150,10cyclictest0-21swapper/008:44:370
28244996150,10cyclictest0-21swapper/007:54:380
28250996058,1cyclictest7235-21kworker/u4:209:23:361
28250996058,1cyclictest11546-21kworker/u4:110:21:361
28250996056,3cyclictest0-21swapper/111:01:361
28250996055,4cyclictest11546-21kworker/u4:110:27:381
28250995955,3cyclictest0-21swapper/111:29:351
28250995955,3cyclictest0-21swapper/110:37:351
28244995957,1cyclictest0-21swapper/011:03:380
28244995957,1cyclictest0-21swapper/009:23:380
28244995957,1cyclictest0-21swapper/007:00:360
28250995854,3cyclictest0-21swapper/110:56:351
28250995854,3cyclictest0-21swapper/109:52:371
28250995854,3cyclictest0-21swapper/109:33:361
28250995854,3cyclictest0-21swapper/109:06:361
28250995854,3cyclictest0-21swapper/107:40:361
28250995853,4cyclictest0-21swapper/106:58:391
28244995853,3cyclictest0-21swapper/009:15:360
28250995755,1cyclictest7628-21kworker/u4:211:14:351
28250995755,1cyclictest3965-21kworker/u4:010:48:371
28250995755,1cyclictest30201-21kworker/u4:011:54:371
28250995754,2cyclictest6058-21kworker/u4:109:01:361
28244995755,1cyclictest6058-21kworker/u4:108:51:370
28244995755,1cyclictest1479-21kworker/u4:009:59:380
28244995755,1cyclictest14686-21kworker/u4:111:18:380
28244995755,1cyclictest0-21swapper/012:17:340
28244995755,1cyclictest0-21swapper/012:13:360
28244995755,1cyclictest0-21swapper/011:41:350
28244995755,1cyclictest0-21swapper/010:42:380
28244995755,1cyclictest0-21swapper/009:45:370
28244995754,2cyclictest23364-21kworker/u4:108:07:360
28244995753,3cyclictest23364-21kworker/u4:108:12:390
28250995654,1cyclictest6489-21kworker/u4:209:57:371
28250995654,1cyclictest23364-21kworker/u4:108:09:381
28250995654,1cyclictest22905-21kworker/u4:009:13:371
28250995654,1cyclictest15159-21kworker/u4:107:48:361
28250995654,1cyclictest14686-21kworker/u4:111:06:351
28250995652,3cyclictest0-21swapper/112:02:361
28250995652,3cyclictest0-21swapper/110:53:351
28244995654,1cyclictest8964-21kworker/u4:210:35:360
28244995654,1cyclictest22501-21kworker/u4:207:18:390
28244995654,1cyclictest0-21swapper/007:13:390
28250995553,1cyclictest23364-21kworker/u4:108:14:371
28250995553,1cyclictest18913-21kworker/u4:207:52:361
28244995451,2cyclictest0-21swapper/009:09:350
28244995248,3cyclictest13342-21ssh10:04:350
28244995148,2cyclictest3-21ksoftirqd/010:55:380
28244995048,1cyclictest3-21ksoftirqd/011:50:360
28244995048,1cyclictest0-21swapper/011:25:360
28244995048,1cyclictest0-21swapper/011:22:370
28244995048,1cyclictest0-21swapper/008:24:380
28244994947,1cyclictest10-21rcuc/008:33:380
28244994947,1cyclictest0-21swapper/012:00:360
28244994846,1cyclictest0-21swapper/008:18:360
28244994845,2cyclictest0-21swapper/007:30:360
28250994642,3cyclictest0-21swapper/112:11:361
28250994642,3cyclictest0-21swapper/109:14:361
28244994644,1cyclictest0-21swapper/012:06:380
28244994138,2cyclictest0-21swapper/011:07:350
28250993936,2cyclictest30201-21kworker/u4:011:44:351
28244993936,2cyclictest0-21swapper/007:49:370
28244993935,3cyclictest0-21swapper/008:55:370
28244993836,1cyclictest23364-21kworker/u4:108:03:360
28244993634,1cyclictest15159-21kworker/u4:107:40:360
2808123327,3sleep10-21swapper/106:53:591
28244993124,5cyclictest15675-21ssh11:54:350
2784522915,11sleep00-21swapper/006:51:280
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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