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2021-10-17 - 04:35

Pentium(R) Dual-Core CPU T4500 @ 2.30GHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #6, slot #7
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the alll highest latencies:
System rack6slot7.osadl.org (updated Sun Oct 17, 2021 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
250122820,0sleep10-21swapper/119:23:271
146002700,1sleep014601-21sh00:15:520
1921099664,61cyclictest0-21swapper/019:56:590
1921099663,62cyclictest0-21swapper/000:35:590
1921099653,61cyclictest27758-21ssh23:06:580
1921099653,61cyclictest0-21swapper/021:04:590
1921099653,61cyclictest0-21swapper/020:58:580
1921099653,61cyclictest0-21swapper/020:47:000
1921099653,61cyclictest0-21swapper/019:33:010
1921799642,61cyclictest0-21swapper/121:31:001
1921799641,61cyclictest1218-21dbus-daemon19:46:011
1921099643,60cyclictest0-21swapper/020:09:590
1921799631,61cyclictest0-21swapper/100:42:011
30052620,1sleep041ktimersoftd/021:51:540
19217996220,41cyclictest0-21swapper/120:58:011
1921799621,60cyclictest15044-21ssh22:07:581
19217996159,1cyclictest12263-21kworker/u4:120:13:581
19217996120,40cyclictest0-21swapper/122:35:591
1921799611,59cyclictest0-21swapper/122:02:591
1921799611,59cyclictest0-21swapper/121:55:591
1921799611,59cyclictest0-21swapper/119:56:591
19210996057,2cyclictest16349-21kworker/u4:023:08:590
19217995957,1cyclictest27058-21kworker/u4:020:49:011
19217995957,1cyclictest24545-21kworker/u4:223:14:011
19210995957,1cyclictest0-21swapper/023:41:010
19210995956,2cyclictest20305-21kworker/u4:021:37:580
19217995856,1cyclictest10116-21kworker/u4:223:29:581
19217995854,3cyclictest0-21swapper/122:43:011
19217995854,3cyclictest0-21swapper/120:36:011
19217995854,3cyclictest0-21swapper/100:10:001
19210995856,1cyclictest22070-21kworker/u4:222:19:590
19210995856,1cyclictest1655-21kworker/u4:121:53:000
19210995856,1cyclictest16386-21kworker/u4:121:26:580
19210995856,1cyclictest14640-21kworker/u4:119:28:570
19210995856,1cyclictest14438-21kworker/u4:020:23:000
19217995756,1cyclictest24837-21kworker/u4:220:40:581
19217995755,1cyclictest20305-21kworker/u4:021:35:001
19217995753,3cyclictest0-21swapper/123:34:011
19217995725,31cyclictest0-21swapper/119:33:571
19210995755,1cyclictest22988-21kworker/u4:019:21:000
19210995755,1cyclictest20492-21kworker/u4:120:30:000
19210995755,1cyclictest10116-21kworker/u4:223:42:580
19217995654,1cyclictest25163-21kworker/u4:200:35:591
19217995643,12cyclictest2826-21ssh23:59:001
19217995624,31cyclictest0-21swapper/119:42:011
19210995654,1cyclictest27058-21kworker/u4:020:49:590
19217995553,1cyclictest26458-21kworker/u4:022:23:591
19217995552,2cyclictest29277-21kworker/u4:220:53:581
19217995552,2cyclictest20305-21kworker/u4:021:42:581
19217995552,2cyclictest14438-21kworker/u4:020:22:581
19217995551,3cyclictest0-21swapper/121:50:591
1921799551,53cyclictest0-21swapper/122:55:591
1921799551,53cyclictest0-21swapper/100:05:011
19210995553,1cyclictest29649-21kworker/u4:219:38:580
19210995551,2cyclictest5600-21diskmemload22:15:000
1921099553,51cyclictest0-21swapper/022:46:000
19217995452,1cyclictest5578-21kworker/u4:219:58:011
19217995452,1cyclictest3038-21kworker/u4:021:04:591
19217995452,1cyclictest20492-21kworker/u4:120:45:581
19217995452,1cyclictest16349-21kworker/u4:023:06:581
19217995452,1cyclictest10034-21kworker/u4:020:09:591
1921799543,50cyclictest0-21swapper/123:55:011
1921799541,52cyclictest0-21swapper/121:11:001
1921799540,53cyclictest0-21swapper/123:18:011
19210995451,2cyclictest0-21swapper/022:05:010
1921099542,51cyclictest0-21swapper/021:42:580
1921099542,51cyclictest0-21swapper/019:58:010
19217995331,21cyclictest0-21swapper/121:25:581
1921799531,51cyclictest0-21swapper/120:29:011
19210995351,1cyclictest0-21swapper/023:14:000
19210995351,1cyclictest0-21swapper/022:12:000
19210995351,1cyclictest0-21swapper/021:34:590
19210995351,1cyclictest0-21swapper/020:18:000
19210995351,1cyclictest0-21swapper/000:06:580
19210995350,2cyclictest0-21swapper/022:51:000
19210995249,2cyclictest0-21swapper/023:22:000
19210995048,1cyclictest0-21swapper/022:58:590
19210995048,1cyclictest0-21swapper/022:40:010
19210995048,1cyclictest0-21swapper/000:25:580
19210995047,2cyclictest0-21swapper/019:52:000
19210994947,1cyclictest0-21swapper/023:50:000
19210994947,1cyclictest0-21swapper/021:16:580
19210994947,1cyclictest0-21swapper/020:55:000
19210994947,1cyclictest0-21swapper/020:37:580
19217994745,1cyclictest10116-21kworker/u4:223:41:011
19210994744,2cyclictest14640-21kworker/u4:119:14:000
19217994643,2cyclictest14109-21kworker/u4:022:16:011
19217994643,2cyclictest0-21swapper/123:08:591
19210994644,1cyclictest0-21swapper/000:19:590
1921099463,42cyclictest0-21swapper/022:23:590
19217994543,1cyclictest5225-21kworker/u4:121:13:001
19217994543,1cyclictest31441-21kworker/u4:000:21:581
19217994543,1cyclictest19399-21kworker/u4:100:31:001
19217994542,2cyclictest0-21swapper/119:21:001
19217994442,1cyclictest31441-21kworker/u4:000:23:011
19217994441,2cyclictest0-21swapper/119:27:591
19217994341,1cyclictest0-21swapper/123:42:581
19217994341,1cyclictest0-21swapper/122:19:591
19217994341,1cyclictest0-21swapper/121:37:581
1921799431,41cyclictest0-21swapper/122:38:001
19217994239,2cyclictest12149-21kworker/u4:222:51:001
19217994139,1cyclictest14438-21kworker/u4:020:18:001
19217994038,1cyclictest14640-21kworker/u4:119:13:001
19210994038,1cyclictest12149-21kworker/u4:222:56:580
19210994037,2cyclictest0-21swapper/023:25:580
1710623928,8sleep10-21swapper/119:08:051
19217993836,1cyclictest31824-21kworker/u4:119:52:001
19217993836,1cyclictest31441-21kworker/u4:000:15:011
19217993836,1cyclictest16349-21kworker/u4:022:58:591
19210993836,1cyclictest0-21swapper/021:10:000
19210993835,2cyclictest0-21swapper/022:32:000
19210993835,2cyclictest0-21swapper/020:17:000
19217993735,1cyclictest10116-21kworker/u4:223:50:001
102932370,0sleep00-21swapper/021:18:170
19217993633,2cyclictest5578-21kworker/u4:220:06:001
1921099363,32cyclictest0-21swapper/000:31:000
1874323314,3sleep00-21swapper/019:09:200
19210993228,2cyclictest10659-21rm22:02:000
19210992826,1cyclictest0-21swapper/023:56:010
19210992825,2cyclictest1667-21runrttasks23:28:010
19210992825,2cyclictest0-21swapper/000:38:580
19217992725,1cyclictest6210-21kworker/u4:023:25:581
19217992724,2cyclictest32172-21kworker/u4:122:32:001
19210992725,1cyclictest0-21swapper/023:57:590
1921099263,22cyclictest0-21swapper/020:06:000
19210992623,2cyclictest0-21swapper/022:32:580
1921099241,14cyclictest0-21swapper/019:23:270
1921099231,14cyclictest8574-21expr00:08:180
1921099221,14cyclictest0-21swapper/019:43:140
19217992016,2cyclictest1655-21kworker/u4:122:02:001
1921099201,13cyclictest17235-21sh23:35:210
1921099191,11cyclictest17336-21df_inode21:28:130
19217991816,1cyclictest8125-21kworker/u4:021:18:591
1921099181,14cyclictest21178-21cstates20:33:120
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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