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2022-01-17 - 01:29

Pentium(R) Dual-Core CPU T4500 @ 2.30GHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #6, slot #7
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the alll highest latencies:
System rack6slot7.osadl.org (updated Sun Jan 16, 2022 12:43:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2356799734,68cyclictest0-21swapper/111:25:461
2356799734,68cyclictest0-21swapper/111:25:461
23567997262,9cyclictest124150irq/30-eth010:16:431
2356799723,68cyclictest0-21swapper/110:02:431
2356799722,69cyclictest0-21swapper/111:06:441
2356799722,69cyclictest0-21swapper/108:42:431
2356799712,68cyclictest0-21swapper/107:24:461
2356799712,68cyclictest0-21swapper/107:19:441
23567996961,7cyclictest0-21swapper/108:54:431
23567996960,8cyclictest0-21swapper/107:48:461
23567996860,7cyclictest0-21swapper/112:22:431
23567996860,7cyclictest0-21swapper/110:48:431
2356699684,62cyclictest2116-21df_inode07:41:430
23567996760,6cyclictest0-21swapper/108:56:441
2356799673,62cyclictest22756-21fschecks_time10:51:431
2356699674,62cyclictest0-21swapper/010:46:440
23567996659,5cyclictest32234-21ssh11:42:461
23567996650,15cyclictest0-21swapper/111:30:431
2356799664,61cyclictest0-21swapper/109:50:461
2356799663,62cyclictest0-21swapper/112:45:431
2356799663,62cyclictest0-21swapper/111:36:461
2356799663,61cyclictest7031-21sort09:51:451
23566996660,4cyclictest26491-21diskstats11:36:430
2356699664,61cyclictest0-21swapper/011:42:450
2356699664,61cyclictest0-21swapper/011:02:440
2356699664,61cyclictest0-21swapper/008:42:440
2356699663,62cyclictest0-21swapper/011:54:450
2356699663,62cyclictest0-21swapper/009:24:460
2356699663,62cyclictest0-21swapper/008:11:460
2356699663,62cyclictest0-21swapper/007:27:440
23567996562,2cyclictest1296-21kworker/u4:107:39:461
23567996561,3cyclictest0-21swapper/110:37:441
23567996552,12cyclictest0-21swapper/112:20:441
23567996551,13cyclictest0-21swapper/108:08:431
2356799654,60cyclictest0-21swapper/110:43:451
2356799654,60cyclictest0-21swapper/108:46:431
2356799653,61cyclictest13555-21ssh10:00:441
2356799653,61cyclictest0-21swapper/111:59:431
2356799653,61cyclictest0-21swapper/111:16:431
2356799653,61cyclictest0-21swapper/109:41:441
2356799653,61cyclictest0-21swapper/108:30:441
2356799653,61cyclictest0-21swapper/107:30:431
2356799653,60cyclictest14570-21diskstats09:21:441
2356799652,62cyclictest0-21swapper/108:31:431
23567996514,50cyclictest0-21swapper/111:00:451
2356699655,59cyclictest0-21swapper/009:47:440
2356699654,60cyclictest0-21swapper/012:08:450
2356699654,60cyclictest0-21swapper/011:12:430
2356699654,60cyclictest0-21swapper/011:07:450
2356699654,60cyclictest0-21swapper/009:52:460
2356699654,60cyclictest0-21swapper/009:12:460
2356699653,61cyclictest0-21swapper/012:40:460
2356699653,61cyclictest0-21swapper/012:31:450
2356699653,61cyclictest0-21swapper/012:28:450
2356699653,61cyclictest0-21swapper/012:19:450
2356699653,61cyclictest0-21swapper/012:12:450
2356699653,61cyclictest0-21swapper/011:59:460
2356699653,61cyclictest0-21swapper/011:35:450
2356699653,61cyclictest0-21swapper/011:29:430
2356699653,61cyclictest0-21swapper/011:22:430
2356699653,61cyclictest0-21swapper/011:22:430
2356699653,61cyclictest0-21swapper/010:59:440
2356699653,61cyclictest0-21swapper/010:53:450
2356699653,61cyclictest0-21swapper/010:42:440
2356699653,61cyclictest0-21swapper/010:23:430
2356699653,61cyclictest0-21swapper/010:13:460
2356699653,61cyclictest0-21swapper/010:08:460
2356699653,61cyclictest0-21swapper/010:02:460
2356699653,61cyclictest0-21swapper/009:42:460
2356699653,61cyclictest0-21swapper/009:37:460
2356699653,61cyclictest0-21swapper/009:29:450
2356699653,61cyclictest0-21swapper/009:19:430
2356699653,61cyclictest0-21swapper/009:00:430
2356699653,61cyclictest0-21swapper/008:51:430
2356699653,61cyclictest0-21swapper/008:47:430
2356699653,61cyclictest0-21swapper/008:32:460
2356699653,61cyclictest0-21swapper/008:28:440
2356699653,61cyclictest0-21swapper/008:21:460
2356699653,61cyclictest0-21swapper/008:17:430
2356699653,61cyclictest0-21swapper/008:03:430
2356699653,61cyclictest0-21swapper/007:56:450
2356699653,61cyclictest0-21swapper/007:53:430
2356699653,61cyclictest0-21swapper/007:47:440
2356699653,61cyclictest0-21swapper/007:36:430
2356699653,61cyclictest0-21swapper/007:31:430
2356699653,61cyclictest0-21swapper/007:22:440
2356699653,61cyclictest0-21swapper/007:20:430
2356699652,62cyclictest0-21swapper/009:31:460
23567996451,12cyclictest0-21swapper/111:02:431
23567996451,12cyclictest0-21swapper/108:19:441
23567996442,21cyclictest0-21swapper/112:05:461
23567996441,22cyclictest0-21swapper/109:08:441
23567996432,31cyclictest0-21swapper/111:11:461
2356799643,60cyclictest0-21swapper/107:51:431
23567996412,50cyclictest10051-21diskmemload12:14:451
23566996460,3cyclictest13014-21ssh11:19:460
23566996458,4cyclictest12881-21df_inode08:06:430
2356699643,60cyclictest0-21swapper/012:23:450
2356699643,60cyclictest0-21swapper/012:02:450
2356699643,60cyclictest0-21swapper/011:47:440
2356699643,60cyclictest0-21swapper/010:37:450
2356699643,60cyclictest0-21swapper/010:33:450
2356699643,60cyclictest0-21swapper/010:27:460
2356699643,60cyclictest0-21swapper/010:19:430
2356699643,60cyclictest0-21swapper/009:06:460
2356699643,60cyclictest0-21swapper/009:01:430
2356699643,60cyclictest0-21swapper/008:37:430
23567996351,11cyclictest0-21swapper/110:35:441
23567996341,21cyclictest0-21swapper/110:07:441
23567996341,21cyclictest0-21swapper/108:15:461
23567996341,21cyclictest0-21swapper/107:56:441
23567996331,31cyclictest840-21ssh10:24:451
23567996331,31cyclictest0-21swapper/111:46:451
23567996331,31cyclictest0-21swapper/109:11:441
23567996312,50cyclictest0-21swapper/111:31:451
23567996312,50cyclictest0-21swapper/109:16:441
23566996331,30cyclictest14543-21iostat12:41:440
23567996257,4cyclictest10051-21diskmemload10:15:431
23567996247,14cyclictest0-21swapper/109:39:461
23567996240,21cyclictest0-21swapper/108:40:461
23567996157,3cyclictest8774-21kworker/u4:109:32:451
23567996054,4cyclictest2909-21ssh10:26:451
23566996056,3cyclictest0-21swapper/009:57:430
23567995956,2cyclictest15959-21kworker/u4:112:10:471
23567995856,1cyclictest8774-21kworker/u4:109:28:431
23567995856,1cyclictest1435-21kworker/u4:012:33:451
23567995845,3cyclictest0-21swapper/107:35:451
23567995755,1cyclictest24888-21kworker/u4:212:39:431
23567995753,3cyclictest10051-21diskmemload12:27:461
23567995745,3cyclictest0-21swapper/108:22:441
23567995654,1cyclictest4413-21kworker/u4:211:51:451
23567995553,1cyclictest5900-21kworker/u4:008:01:451
23567995348,4cyclictest0-21swapper/109:01:461
23567995348,4cyclictest0-21swapper/107:41:441
2310823015,11sleep00-21swapper/007:13:170
2179022315,4sleep10-21swapper/107:11:411
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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