You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-07-07 - 05:38

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #7, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack7slot4s.osadl.org (updated Mon Jul 07, 2025 00:45:07)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1298299776,59cyclictest14782-21ssh22:00:150
1298299776,59cyclictest14782-21ssh22:00:140
1298299765,22cyclictest12-21ksoftirqd/023:40:140
13006997040,20cyclictest32466irq/58-eth022:50:133
1299099514,11cyclictest131rcu_preempt22:05:131
1299899490,41cyclictest23136-21ssh21:45:132
1299099476,28cyclictest31148-21ssh21:50:161
12982994729,8cyclictest31197-21diskmemload21:45:130
1299899462,4cyclictest131rcu_preempt23:00:152
12998994612,22cyclictest27-21ksoftirqd/223:20:162
1298299462,35cyclictest30429-21ssh22:30:150
1299099452,33cyclictest13869-21ssh22:40:141
1298299444,31cyclictest20378-21ssh23:25:130
1299899432,30cyclictest0-21swapper/221:20:192
12998994222,8cyclictest27-21ksoftirqd/222:15:142
1298299429,24cyclictest12-21ksoftirqd/020:50:150
1298299422,31cyclictest29007-21ssh23:10:140
1299099412,31cyclictest28303-21ssh23:30:151
1299899381,29cyclictest6441-21sh00:15:232
12990993818,14cyclictest21-21ksoftirqd/119:35:141
1299899372,18cyclictest26984-21cut00:30:242
1299099373,28cyclictest15153-21ssh21:40:161
12982993725,7cyclictest12-21ksoftirqd/023:55:160
1299899362,28cyclictest2239-21ssh00:14:242
1298299368,18cyclictest12-21ksoftirqd/022:10:140
1300699353,20cyclictest32466irq/58-eth022:05:133
1300699352,23cyclictest32466irq/58-eth000:30:153
1300699351,19cyclictest0-21swapper/321:50:163
13006993414,12cyclictest32466irq/58-eth022:45:123
1298299342,20cyclictest27615-21ssh00:10:110
1299899331,27cyclictest261rcuc/223:10:132
1299899331,23cyclictest21858-21ssh22:45:132
1298299338,18cyclictest12-21ksoftirqd/021:05:130
1298299333,18cyclictest12-21ksoftirqd/019:20:140
1299099321,21cyclictest0-21swapper/121:55:131
1298299329,13cyclictest12523-21kworker/u8:123:45:120
1298299322,24cyclictest12-21ksoftirqd/023:15:140
1300699312,20cyclictest32466irq/58-eth022:15:153
1300699312,18cyclictest32466irq/58-eth000:10:113
1299899313,20cyclictest23346irq/40-dwc2_hso21:00:162
1299899313,19cyclictest23346irq/40-dwc2_hso21:50:142
1299899313,17cyclictest13865-21ssh22:40:142
1298299312,18cyclictest151rcuc/022:20:150
13006993012,12cyclictest32466irq/58-eth021:10:183
1299899303,20cyclictest0-21swapper/222:30:152
1299899302,21cyclictest6704-21ssh21:55:152
1299099302,19cyclictest0-21swapper/100:15:141
1300699294,16cyclictest32466irq/58-eth000:25:153
1300699292,20cyclictest0-21swapper/322:10:143
1299899292,11cyclictest30566-21ssh23:30:222
12998992914,11cyclictest23072-21sshd00:27:232
1299099292,21cyclictest6499-21ssh22:15:161
1299099292,19cyclictest15522-21ssh21:20:201
1299899283,18cyclictest23346irq/40-dwc2_hso00:35:142
1299899283,17cyclictest23346irq/40-dwc2_hso19:10:142
1299899282,21cyclictest31604-21ssh21:10:172
1299899282,21cyclictest17974-21ssh00:02:242
1299899282,20cyclictest0-21swapper/220:10:152
1299899282,19cyclictest0-21swapper/219:45:142
1299899282,19cyclictest0-21swapper/219:20:142
1298299283,15cyclictest628-21Async09:12:570
1298299281,6cyclictest12-21ksoftirqd/019:50:140
1300699273,18cyclictest0-21swapper/320:40:183
1299899272,20cyclictest0-21swapper/200:21:242
1299099276,10cyclictest0-21swapper/119:55:161
1298299271,5cyclictest131rcu_preempt20:20:140
1299899263,14cyclictest23346irq/40-dwc2_hso19:30:152
1299899262,19cyclictest0-21swapper/223:40:162
12998992614,5cyclictest0-21swapper/221:15:332
1299099262,20cyclictest22457-21ssh22:25:161
1298299262,6cyclictest12-21ksoftirqd/023:30:150
1298299261,6cyclictest12-21ksoftirqd/019:15:140
1298299261,4cyclictest131rcu_preempt19:25:150
1298299261,4cyclictest131rcu_preempt19:25:140
1300699252,15cyclictest32466irq/58-eth019:35:133
1299899251,11cyclictest24119-21ssh21:25:212
12998992510,12cyclictest8083-21sh23:55:322
12990992519,3cyclictest0-21swapper/123:45:311
12990992510,4cyclictest131rcu_preempt00:10:181
1298299255,6cyclictest121ksoftirqd/000:33:240
1300699242,12cyclictest0-21swapper/321:55:133
1300699241,13cyclictest32466irq/58-eth000:15:153
12998992415,4cyclictest27-21ksoftirqd/219:15:162
12998992411,6cyclictest11011-21ssh23:38:542
1299899241,16cyclictest0-21swapper/220:55:042
1299899241,13cyclictest26131-21kthreadcore22:05:232
12998992411,11cyclictest0-21swapper/219:55:242
12998992411,11cyclictest0-21swapper/219:50:282
1299099244,14cyclictest0-21swapper/100:30:161
1299099243,17cyclictest21019-21ssh23:05:181
1299099243,17cyclictest21019-21ssh23:05:171
12990992417,3cyclictest0-21swapper/122:55:151
1299099241,18cyclictest20602-21apt-get20:25:131
12990992411,3cyclictest31197-21diskmemload23:01:331
1298299241,19cyclictest22967-21ssh21:45:020
12982992411,5cyclictest0-21swapper/021:10:550
12982992410,10cyclictest628-21Async09:12:570
1299899232,16cyclictest0-21swapper/223:29:232
1299899231,5cyclictest31197-21diskmemload23:50:182
1299899231,18cyclictest27759-21kthreadcore21:05:202
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional