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2025-07-15 - 04:24

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #7, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack7slot4s.osadl.org (updated Tue Jul 15, 2025 00:45:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
645899572,30cyclictest6478-21ssh00:35:172
6442995643,4cyclictest575-21ssh21:15:110
645899541,40cyclictest916-21snmpd23:50:132
6442995424,23cyclictest12-21ksoftirqd/021:00:160
644799533,41cyclictest22090-21ssh23:45:131
644299502,7cyclictest131rcu_preempt00:05:120
645899482,25cyclictest16646-21ssh21:25:182
644799462,36cyclictest14565-21ssh00:00:141
644799453,35cyclictest813-21ssh21:55:151
644299454,7cyclictest131rcu_preempt19:30:160
644799441,33cyclictest17560-21ssh22:05:141
644299441,35cyclictest15432-21ssh00:20:140
644299441,34cyclictest18378-21ssh22:25:180
644299440,36cyclictest26721-21ssh22:30:130
6481994324,12cyclictest32466irq/58-eth023:25:143
644299431,33cyclictest2547-21ssh22:35:150
6481994227,9cyclictest32466irq/58-eth000:25:183
644299421,34cyclictest11670-21ssh23:00:130
648199392,22cyclictest32466irq/58-eth022:30:143
645899374,4cyclictest131rcu_preempt19:30:162
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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