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2026-07-18 - 13:23

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #7, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack7slot4s.osadl.org (updated Sat Jul 18, 2026 00:45:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2341099775,43cyclictest20929-21ssh00:15:122
2339999552,46cyclictest13491-21ssh21:30:131
2339999522,41cyclictest20163-21ssh22:45:141
2339999512,5cyclictest131rcu_preempt20:30:111
2342299503,30cyclictest35966irq/58-eth022:00:133
2342299503,30cyclictest35966irq/58-eth022:00:133
2341099482,33cyclictest31724-21ssh21:40:132
2339099482,33cyclictest20143-21ssh22:45:120
2339999473,9cyclictest131rcu_preempt22:35:121
2339099461,39cyclictest11901-21ssh00:10:130
2339099461,36cyclictest22569-21rm21:35:130
2339099461,36cyclictest22569-21rm21:35:130
2341099442,24cyclictest17582-21ssh21:50:152
2339099443,35cyclictest29137-21ssh22:50:140
2339999431,35cyclictest21419-21ssh22:10:121
2339099434,31cyclictest9014-21diskmemload21:10:130
23422994223,11cyclictest35966irq/58-eth021:30:133
2339099422,30cyclictest17576-21ssh21:50:130
2342299414,22cyclictest35966irq/58-eth023:15:123
23410994120,13cyclictest0-21swapper/221:45:132
23422994017,11cyclictest0-21swapper/322:08:313
2341099401,17cyclictest9493-21sh21:10:132
2339099404,32cyclictest31715-21ssh21:40:110
23390994018,18cyclictest12-21ksoftirqd/022:00:140
23390994018,18cyclictest12-21ksoftirqd/022:00:130
2342299394,21cyclictest35966irq/58-eth022:30:123
2342299393,23cyclictest35966irq/58-eth020:40:133
23390993915,17cyclictest29978-21ssh00:20:130
23410993811,10cyclictest18181-21cat21:30:302
2339999381,31cyclictest26377-21ssh00:00:151
2339099381,29cyclictest22571-21ssh23:40:120
2342299371,21cyclictest35966irq/58-eth000:00:123
2342299371,20cyclictest35966irq/58-eth000:05:143
2339099362,24cyclictest25239-21ssh22:30:120
2341099352,27cyclictest29988-21ssh00:20:142
2339999356,21cyclictest9712-21ssh23:15:121
23399993528,4cyclictest22568-21sh21:35:131
23399993528,4cyclictest22568-21sh21:35:121
2339099352,24cyclictest30501-21ssh22:15:140
2342299342,17cyclictest35966irq/58-eth000:20:133
2342299341,22cyclictest35966irq/58-eth023:40:133
2341099332,29cyclictest17265-21ssh23:55:132
2341099332,29cyclictest17265-21ssh23:55:122
2341099332,24cyclictest28573-21ssh21:36:482
2341099332,24cyclictest28573-21ssh21:36:472
2342299325,13cyclictest35966irq/58-eth000:15:143
2339099323,19cyclictest9014-21diskmemload22:35:120
2339099321,20cyclictest6472-21ssh00:25:110
2342299313,17cyclictest35966irq/58-eth021:25:133
2341099312,18cyclictest27346irq/40-dwc2_hso23:05:122
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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