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2023-12-11 - 04:09

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #8, slot #2

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by a total of 2 SMIs that occured during the measurement.
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack8slot2s.osadl.org (updated Mon Dec 11, 2023 00:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
20689991420,1cyclictest0-21swapper/319:27:023
2068899121119,1cyclictest0-21swapper/219:27:022
1516721180,0sleep20-21swapper/222:18:082
20125210545,31sleep30-21swapper/319:09:013
234642930,0sleep30-21swapper/323:58:103
2019629246,36sleep00-21swapper/019:09:540
2010429146,33sleep20-21swapper/219:08:432
1832029049,30sleep10-21swapper/119:07:581
6372860,1sleep0635-21aten2.4_r8power00:08:050
20687998678,7cyclictest0-21swapper/119:27:021
168882830,0sleep10-21swapper/121:15:511
20686997370,2cyclictest0-21swapper/019:27:020
20689996865,2cyclictest0-21swapper/319:12:503
20688994139,1cyclictest0-21swapper/219:12:502
38732340,1sleep20-21swapper/223:38:412
20687993226,1cyclictest211rcuc/123:32:101
283322290,0sleep00-21swapper/021:58:100
283322290,0sleep00-21swapper/021:58:100
2068899291,27cyclictest0-21swapper/219:28:042
61562280,0sleep00-21swapper/023:10:490
229892280,1sleep30-21swapper/300:29:403
249112270,0sleep30-21swapper/323:28:163
20687992620,1cyclictest211rcuc/122:48:061
185692230,1sleep20-21swapper/223:23:062
20687992211,2cyclictest22-21ksoftirqd/122:55:251
2068899210,1cyclictest0-21swapper/220:03:052
2068799205,4cyclictest22-21ksoftirqd/100:00:411
2068799192,11cyclictest22-21ksoftirqd/123:53:291
20689991816,1cyclictest0-21swapper/320:08:023
2068799187,2cyclictest22-21ksoftirqd/120:56:211
2068799186,3cyclictest22-21ksoftirqd/123:03:061
20686991810,2cyclictest141rcu_preempt20:19:410
20686991810,2cyclictest141rcu_preempt20:19:410
2068799177,6cyclictest22-21ksoftirqd/121:33:171
2068799173,11cyclictest9708-21kworker/1:200:05:471
20687991712,1cyclictest211rcuc/122:32:051
2068699174,10cyclictest27705-21ssh23:31:310
2068699173,8cyclictest9178-21threads21:38:160
2068699173,3cyclictest141rcu_preempt23:53:050
2068999161,2cyclictest0-21swapper/321:13:053
2068899165,6cyclictest0-21swapper/220:49:592
2068899164,9cyclictest13437-21sed23:48:192
2068799165,8cyclictest141rcu_preempt22:23:251
2068799164,5cyclictest141rcu_preempt23:08:591
2068799163,9cyclictest22-21ksoftirqd/121:40:471
2068799162,7cyclictest22-21ksoftirqd/123:33:461
20687991610,5cyclictest22-21ksoftirqd/122:39:291
20686991614,1cyclictest0-21swapper/023:03:050
2068799155,6cyclictest22-21ksoftirqd/122:13:081
2068799155,6cyclictest22-21ksoftirqd/121:52:501
2068799154,2cyclictest9708-21kworker/1:221:31:031
2068799153,5cyclictest9708-21kworker/1:221:24:351
2068799152,6cyclictest22-21ksoftirqd/123:14:041
20687991510,3cyclictest22-21ksoftirqd/123:02:441
2068799150,9cyclictest2408-21unixbench_singl19:38:151
2068699150,9cyclictest29668-21basename21:28:060
203472150,1sleep10-21swapper/121:49:461
223012140,4sleep3341ksoftirqd/321:52:443
2068999145,6cyclictest0-21swapper/322:24:503
2068999142,9cyclictest15068-21ntp_offset22:48:153
2068799149,4cyclictest22-21ksoftirqd/122:04:331
2068799145,5cyclictest15164-21sh22:18:081
2068799143,6cyclictest22-21ksoftirqd/120:18:041
2068799143,6cyclictest22-21ksoftirqd/120:18:041
2068799143,6cyclictest22-21ksoftirqd/100:30:201
2068799143,2cyclictest141rcu_preempt00:40:031
20687991410,3cyclictest22-21ksoftirqd/121:22:441
20687991410,3cyclictest22-21ksoftirqd/120:02:441
20687991410,2cyclictest22-21ksoftirqd/119:22:441
2068699144,5cyclictest0-21swapper/021:57:070
20686991410,3cyclictest131rcuc/021:43:490
20686991410,3cyclictest12-21ksoftirqd/000:42:440
2068999138,3cyclictest29914-21munin-plugin-st22:32:453
2068999134,3cyclictest0-21swapper/300:38:593
2068999133,6cyclictest9668-21memory22:43:123
2068999131,7cyclictest0-21swapper/322:53:093
2068999130,11cyclictest11142-21fschecks_time00:18:113
2068899136,5cyclictest25214-21grep22:58:092
2068899136,5cyclictest12872-21basename21:12:442
2068899135,6cyclictest0-21swapper/221:17:542
2068899135,2cyclictest8322-21cut21:38:072
2068899134,6cyclictest0-21swapper/220:57:482
2068899134,4cyclictest26564-21ssh23:29:462
2068899134,4cyclictest0-21swapper/220:37:172
2068899131,9cyclictest15917-21cpuspeed_turbos00:23:102
2068799136,2cyclictest22-21ksoftirqd/121:01:351
2068799135,5cyclictest0-21swapper/121:05:211
2068799135,5cyclictest0-21swapper/120:06:571
2068799135,3cyclictest22-21ksoftirqd/121:43:101
2068799135,2cyclictest22-21ksoftirqd/122:34:551
2068799134,7cyclictest0-21swapper/123:45:571
2068799134,6cyclictest22-21ksoftirqd/123:41:111
2068799134,3cyclictest22-21ksoftirqd/100:18:481
2068799133,7cyclictest22-21ksoftirqd/100:09:321
2068799133,6cyclictest22-21ksoftirqd/100:23:051
2068799133,5cyclictest0-21swapper/121:59:341
2068799133,5cyclictest0-21swapper/121:59:341
2068799132,3cyclictest22-21ksoftirqd/122:08:481
2068799132,2cyclictest141rcu_preempt23:23:311
2068799131,7cyclictest22-21ksoftirqd/120:33:111
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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