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2023-09-28 - 21:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by a total of 2 SMIs that occured during the measurement.
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot2.osadl.org (updated Thu Sep 28, 2023 12:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
19725210444,31sleep30-21swapper/307:06:493
94352990,1sleep20-21swapper/209:07:072
21960999486,7cyclictest0-21swapper/107:11:541
21960999384,8cyclictest0-21swapper/107:26:591
227952920,0sleep20-21swapper/210:01:422
131542920,0sleep30-21swapper/308:02:073
2156129145,34sleep20-21swapper/207:10:092
2140329046,32sleep00-21swapper/007:08:060
2137429048,31sleep10-21swapper/107:07:431
76572840,0sleep30-21swapper/307:51:413
202382810,0sleep00-21swapper/012:08:410
21959997573,1cyclictest0-21swapper/007:11:540
21959997371,1cyclictest0-21swapper/007:26:590
268142310,1sleep30-21swapper/312:15:063
2196099281,26cyclictest0-21swapper/110:02:001
134212260,1sleep20-21swapper/212:32:082
58032250,1sleep20-21swapper/211:56:172
62472240,1sleep30-21swapper/311:27:003
270232230,1sleep00-21swapper/011:45:490
221402230,0sleep20-21swapper/212:11:202
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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