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2022-12-08 - 11:54

x86 Intel Core i5-750 @2667 MHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #8, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack8slot3.osadl.org (updated Wed Dec 07, 2022 12:44:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
184792220105,110sleep30-21swapper/307:08:133
182722179159,15sleep10-21swapper/107:05:551
183642177108,64sleep00-21swapper/007:06:580
183392175158,13sleep20-21swapper/207:06:412
446021300,4sleep30-21swapper/311:52:513
107662830,0sleep0131rcuc/010:21:100
18879993119,11cyclictest0-21swapper/211:58:262
1887999308,21cyclictest0-21swapper/210:13:062
1887999307,22cyclictest0-21swapper/210:42:522
1887899308,21cyclictest0-21swapper/112:14:311
1887899304,25cyclictest0-21swapper/109:20:231
1887999297,21cyclictest0-21swapper/209:30:212
18879992921,7cyclictest0-21swapper/211:41:362
1887899293,25cyclictest0-21swapper/108:35:241
1887999287,20cyclictest0-21swapper/210:05:542
18879992817,11cyclictest0-21swapper/209:41:192
18879992815,12cyclictest0-21swapper/211:33:412
18879992813,6cyclictest0-21swapper/212:26:112
1887899288,19cyclictest0-21swapper/112:22:421
1887899288,19cyclictest0-21swapper/110:54:041
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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