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2021-10-16 - 13:18

Intel(R) Core(TM) i5 CPU 750 @ 2.67GHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #8, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack8slot3.osadl.org (updated Sat Oct 16, 2021 00:44:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
14119223887,147sleep20-21swapper/219:08:452
13731218586,93sleep30-21swapper/319:05:293
141282184165,15sleep10-21swapper/119:08:511
140132178105,69sleep00-21swapper/019:07:300
2943021150,2sleep10-21swapper/123:20:251
87482870,2sleep10-21swapper/100:05:271
14476993215,16cyclictest0-21swapper/123:43:441
14476993114,16cyclictest0-21swapper/123:09:491
14478993017,12cyclictest0-21swapper/321:35:143
14476993017,12cyclictest0-21swapper/123:46:091
14476993016,13cyclictest0-21swapper/123:12:411
14476993014,15cyclictest0-21swapper/121:13:481
1447799293,25cyclictest0-21swapper/221:53:402
14477992916,12cyclictest0-21swapper/221:34:552
14476992915,13cyclictest0-21swapper/123:27:481
14476992915,13cyclictest0-21swapper/100:30:471
14476992914,14cyclictest0-21swapper/122:31:041
14478992813,14cyclictest0-21swapper/300:33:123
14476992815,12cyclictest0-21swapper/123:18:511
14476992815,11cyclictest0-21swapper/121:25:071
14476992814,13cyclictest0-21swapper/122:36:301
14476992814,13cyclictest0-21swapper/122:04:301
14476992812,15cyclictest0-21swapper/122:29:131
14476992812,15cyclictest0-21swapper/121:40:071
14476992812,15cyclictest0-21swapper/100:39:231
14476992811,16cyclictest0-21swapper/122:41:381
14476992715,11cyclictest0-21swapper/120:00:181
14476992714,12cyclictest0-21swapper/123:31:231
14476992714,12cyclictest0-21swapper/121:17:381
14476992713,13cyclictest0-21swapper/122:45:021
14476992713,13cyclictest0-21swapper/121:32:091
3053922615,9sleep30-21swapper/323:22:093
14478992615,10cyclictest0-21swapper/322:20:243
14478992614,11cyclictest0-21swapper/323:18:433
14478992612,13cyclictest0-21swapper/300:38:263
1447799265,20cyclictest0-21swapper/223:25:362
1447799264,21cyclictest0-21swapper/222:20:232
1447799264,21cyclictest0-21swapper/221:44:252
1447699263,22cyclictest0-21swapper/120:41:411
1447699262,23cyclictest0-21swapper/119:39:251
14476992617,8cyclictest0-21swapper/100:25:231
14476992616,9cyclictest0-21swapper/100:24:331
14476992615,10cyclictest0-21swapper/123:56:371
14476992615,10cyclictest0-21swapper/122:57:141
14476992615,10cyclictest0-21swapper/122:05:031
14476992615,10cyclictest0-21swapper/121:48:231
14476992615,10cyclictest0-21swapper/121:05:261
14476992614,11cyclictest0-21swapper/123:35:141
14476992614,11cyclictest0-21swapper/100:15:041
14476992613,12cyclictest0-21swapper/123:01:151
14476992613,12cyclictest0-21swapper/122:13:381
14476992612,13cyclictest0-21swapper/122:53:481
14476992612,13cyclictest0-21swapper/121:51:291
14476992610,15cyclictest0-21swapper/123:51:181
1447899259,15cyclictest0-21swapper/322:49:003
1447899257,17cyclictest0-21swapper/321:23:353
14478992517,7cyclictest0-21swapper/322:54:493
14478992514,10cyclictest0-21swapper/321:15:533
14478992513,11cyclictest0-21swapper/321:26:343
14478992510,14cyclictest0-21swapper/321:50:523
1447799259,15cyclictest0-21swapper/223:57:252
1447799255,19cyclictest0-21swapper/223:53:542
1447799255,19cyclictest0-21swapper/223:49:032
1447799255,19cyclictest0-21swapper/223:40:392
1447799255,19cyclictest0-21swapper/222:02:312
1447799255,19cyclictest0-21swapper/221:48:092
1447799255,19cyclictest0-21swapper/221:37:562
1447799254,20cyclictest0-21swapper/222:28:132
1447799253,21cyclictest0-21swapper/223:32:012
1447799252,22cyclictest0-21swapper/221:18:462
1447799252,22cyclictest0-21swapper/200:18:492
14476992515,9cyclictest0-21swapper/122:20:081
14476992515,9cyclictest0-21swapper/122:16:441
14476992515,9cyclictest0-21swapper/121:56:451
14476992515,9cyclictest0-21swapper/121:35:331
14476992515,9cyclictest0-21swapper/121:20:151
14476992515,9cyclictest0-21swapper/120:35:221
14476992515,9cyclictest0-21swapper/120:05:191
14476992515,9cyclictest0-21swapper/119:50:281
14476992515,9cyclictest0-21swapper/119:20:171
14476992515,9cyclictest0-21swapper/119:19:201
14476992515,9cyclictest0-21swapper/119:10:181
14476992515,9cyclictest0-21swapper/100:10:251
14476992514,10cyclictest0-21swapper/121:00:561
14476992514,10cyclictest0-21swapper/120:30:241
14476992514,10cyclictest0-21swapper/100:00:241
1931922415,7sleep30-21swapper/321:30:183
1447899248,15cyclictest0-21swapper/300:10:393
1447899246,17cyclictest0-21swapper/322:57:453
1447899246,17cyclictest0-21swapper/322:06:303
14478992413,10cyclictest0-21swapper/323:32:073
14478992413,10cyclictest0-21swapper/321:48:483
14478992410,13cyclictest0-21swapper/323:42:523
1447799246,17cyclictest0-21swapper/222:42:332
1447799245,18cyclictest0-21swapper/223:37:382
1447799245,18cyclictest0-21swapper/223:15:202
1447799245,18cyclictest0-21swapper/222:59:232
1447799243,20cyclictest0-21swapper/223:11:182
1447799243,20cyclictest0-21swapper/200:03:422
1447799242,21cyclictest0-21swapper/223:24:032
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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