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2023-01-27 - 15:46

x86 Intel Core i5-750 @2667 MHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #8, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100, Linux 4.9.20-rt16, x86_64 highest latencies:
System rack8slot3.osadl.org (updated Fri Jan 27, 2023 12:45:00)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
239112180161,15sleep20-21swapper/207:08:572
236142179108,66sleep30-21swapper/307:05:293
237912177105,67sleep10-21swapper/107:07:311
232502117105,7sleep00-21swapper/007:05:220
167062890,5sleep10-21swapper/110:21:381
257162830,6sleep30-21swapper/311:04:203
174192810,6sleep30-21swapper/311:28:053
141862800,0sleep041ktimersoftd/010:20:010
141862800,0sleep041ktimersoftd/010:20:010
58062390,1sleep00-21swapper/009:00:220
24261993316,16cyclictest0-21swapper/310:55:333
2426099336,26cyclictest0-21swapper/210:11:412
2426099334,28cyclictest0-21swapper/211:40:592
2426099328,23cyclictest0-21swapper/211:38:342
2426099328,23cyclictest0-21swapper/211:33:412
2426099327,24cyclictest0-21swapper/209:21:552
2426099326,25cyclictest0-21swapper/209:30:232
2426099325,26cyclictest0-21swapper/212:25:052
2426099319,21cyclictest0-21swapper/211:26:142
2426099318,22cyclictest0-21swapper/212:06:262
2426099318,22cyclictest0-21swapper/211:03:452
2426099316,24cyclictest0-21swapper/211:10:092
2426099316,24cyclictest0-21swapper/209:46:222
2426099316,24cyclictest0-21swapper/209:36:062
2426099315,25cyclictest0-21swapper/212:19:122
2426099315,25cyclictest0-21swapper/211:20:492
2426099314,26cyclictest0-21swapper/210:15:182
2426099314,26cyclictest0-21swapper/210:15:172
24261993016,13cyclictest0-21swapper/312:09:163
24261993016,13cyclictest0-21swapper/311:05:153
2426099309,20cyclictest0-21swapper/209:41:462
2426099308,21cyclictest0-21swapper/212:32:202
2426099308,21cyclictest0-21swapper/211:06:252
2426099308,21cyclictest0-21swapper/209:14:052
2426099306,23cyclictest0-21swapper/210:55:462
2426099306,23cyclictest0-21swapper/210:23:372
2426099304,25cyclictest0-21swapper/210:42:002
2426099304,25cyclictest0-21swapper/210:38:462
2426099304,25cyclictest0-21swapper/209:28:322
2426099304,25cyclictest0-21swapper/207:48:152
2426099303,26cyclictest0-21swapper/211:16:402
24261992915,13cyclictest0-21swapper/311:13:253
2426099297,21cyclictest0-21swapper/212:20:302
2426099297,21cyclictest0-21swapper/210:50:522
2426099297,21cyclictest0-21swapper/210:48:452
2426099297,21cyclictest0-21swapper/210:26:362
2426099297,21cyclictest0-21swapper/209:59:082
2426099296,22cyclictest0-21swapper/211:51:162
2426099296,22cyclictest0-21swapper/210:03:342
2426099295,23cyclictest0-21swapper/211:56:202
2426099295,23cyclictest0-21swapper/211:47:502
2426099294,24cyclictest0-21swapper/210:30:262
2426099293,25cyclictest0-21swapper/212:36:052
24260992910,18cyclictest0-21swapper/212:12:282
2425999298,20cyclictest0-21swapper/112:22:391
2425999295,23cyclictest0-21swapper/111:18:361
24261992816,11cyclictest0-21swapper/310:10:373
24261992815,12cyclictest0-21swapper/311:48:503
24261992814,12cyclictest155162sleep312:30:253
2426099288,20cyclictest0-21swapper/212:02:582
2426099287,20cyclictest0-21swapper/210:08:142
2426099286,21cyclictest0-21swapper/209:16:342
2426099285,22cyclictest0-21swapper/209:05:262
2426099285,22cyclictest0-21swapper/208:30:222
2425999286,21cyclictest0-21swapper/111:31:321
2425999283,24cyclictest0-21swapper/110:14:581
24261992716,10cyclictest0-21swapper/311:54:073
24261992716,10cyclictest0-21swapper/310:28:033
24261992715,11cyclictest323102sleep308:45:263
24261992715,11cyclictest123192sleep312:27:323
24261992715,11cyclictest109452sleep309:10:323
24261992715,11cyclictest0-21swapper/311:57:183
24261992715,11cyclictest0-21swapper/309:43:203
24261992714,12cyclictest0-21swapper/309:34:233
24261992714,11cyclictest32143-21chrt07:28:273
24261992714,11cyclictest16226-21taskset08:06:553
2426099276,20cyclictest0-21swapper/209:50:362
2426099273,23cyclictest0-21swapper/208:50:002
2425999276,20cyclictest0-21swapper/111:21:281
2425999276,20cyclictest0-21swapper/111:03:021
2425999274,22cyclictest0-21swapper/112:33:251
2425999273,23cyclictest0-21swapper/111:25:101
2425999272,24cyclictest0-21swapper/109:17:301
24259992711,15cyclictest0-21swapper/111:07:201
24261992615,10cyclictest307512sleep308:43:003
24261992615,10cyclictest28752sleep308:55:113
24261992615,10cyclictest17422sleep307:33:213
24261992615,10cyclictest122062sleep307:58:073
24261992615,10cyclictest0-21swapper/312:35:543
24261992615,10cyclictest0-21swapper/312:21:293
24261992615,10cyclictest0-21swapper/312:17:343
24261992615,10cyclictest0-21swapper/312:10:233
24261992615,10cyclictest0-21swapper/311:40:253
24261992615,10cyclictest0-21swapper/311:35:143
24261992615,10cyclictest0-21swapper/311:31:203
24261992615,10cyclictest0-21swapper/311:20:143
24261992615,10cyclictest0-21swapper/311:16:333
24261992615,10cyclictest0-21swapper/310:45:293
24261992615,10cyclictest0-21swapper/310:40:123
24261992615,10cyclictest0-21swapper/310:35:023
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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