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2020-06-06 - 14:57

Intel(R) Core(TM) i5 CPU 750 @ 2.67GHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #8, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack8slot3.osadl.org (updated Sat Jun 06, 2020 12:44:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
63462231160,67sleep10-21swapper/107:09:041
60772230156,69sleep30-21swapper/307:05:573
6058218486,93sleep20-21swapper/207:05:442
61662179105,69sleep00-21swapper/007:06:590
6661994020,19cyclictest0-21swapper/109:16:231
6661993922,16cyclictest0-21swapper/112:09:001
6661993920,18cyclictest0-21swapper/110:08:001
6661993919,19cyclictest0-21swapper/109:29:271
6663993817,20cyclictest0-21swapper/310:42:143
6661993819,18cyclictest0-21swapper/111:00:051
6663993719,17cyclictest0-21swapper/310:07:053
6661993722,14cyclictest0-21swapper/110:14:551
6661993721,15cyclictest0-21swapper/110:57:431
6661993619,16cyclictest0-21swapper/111:30:291
6661993619,16cyclictest0-21swapper/111:11:401
6661993619,16cyclictest0-21swapper/110:22:001
6661993619,16cyclictest0-21swapper/109:55:021
6661993618,17cyclictest0-21swapper/111:41:221
6661993618,17cyclictest0-21swapper/111:08:291
6661993618,17cyclictest0-21swapper/110:48:211
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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