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2021-06-13 - 00:34

Intel(R) Core(TM) i5 CPU 750 @ 2.67GHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #8, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack8slot3.osadl.org (updated Sat Jun 12, 2021 12:44:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
228632181107,69sleep30-21swapper/307:09:593
210412178159,15sleep10-21swapper/107:05:101
228422176108,64sleep00-21swapper/007:09:440
227192175159,12sleep20-21swapper/207:08:242
284922860,3sleep20-21swapper/209:33:452
23111993322,10cyclictest0-21swapper/107:15:171
23111993220,11cyclictest0-21swapper/109:50:411
23111993121,9cyclictest0-21swapper/112:10:171
23111993121,9cyclictest0-21swapper/111:05:141
23111993121,9cyclictest0-21swapper/108:52:351
23111993121,9cyclictest0-21swapper/108:40:131
23111993120,10cyclictest0-21swapper/109:45:511
23111993114,16cyclictest0-21swapper/109:14:381
23111993021,8cyclictest0-21swapper/112:00:441
23111993020,9cyclictest0-21swapper/110:40:361
23111993019,10cyclictest0-21swapper/111:35:191
23111993019,10cyclictest0-21swapper/110:12:071
23111993019,10cyclictest0-21swapper/109:35:361
23111993019,10cyclictest0-21swapper/108:45:211
23111993019,10cyclictest0-21swapper/107:20:171
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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