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2022-07-05 - 20:23

x86 Intel Core i7-3770 @3400 MHz, Linux 3.18.69-rt75 (Profile)

Latency plot of system in rack #8, slot #5
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack8slot5.osadl.org (updated Tue Jul 05, 2022 12:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1019327958,8sleep50-21swapper/504:52:515
1009127150,8sleep60-21swapper/604:51:246
1016827049,8sleep70-21swapper/704:52:297
1013226150,8sleep20-21swapper/204:52:002
1017425837,8sleep40-21swapper/404:52:344
1006425635,8sleep00-21swapper/004:51:010
1011525342,8sleep30-21swapper/304:51:453
1005624635,8sleep10-21swapper/104:50:541
10406991714,2cyclictest0-21swapper/707:26:247
1040699170,16cyclictest0-21swapper/707:20:487
1040599170,16cyclictest0-21swapper/608:20:446
1040599170,16cyclictest0-21swapper/607:40:206
1040499170,16cyclictest0-21swapper/509:48:285
1040499170,16cyclictest0-21swapper/508:21:395
10405991613,2cyclictest0-21swapper/609:20:026
10405991613,2cyclictest0-21swapper/608:42:016
1040599160,15cyclictest0-21swapper/609:05:246
1040599160,15cyclictest0-21swapper/609:02:586
1040599160,15cyclictest0-21swapper/607:21:356
1040499160,15cyclictest0-21swapper/510:19:255
1040499160,15cyclictest0-21swapper/510:17:185
1040499160,15cyclictest0-21swapper/509:05:035
1040499160,15cyclictest0-21swapper/509:03:125
1040499160,15cyclictest0-21swapper/508:29:025
1040499160,15cyclictest0-21swapper/507:18:595
1040299160,15cyclictest0-21swapper/307:29:053
1040199160,15cyclictest0-21swapper/209:03:382
1040099160,15cyclictest0-21swapper/108:20:331
1040099160,15cyclictest0-21swapper/107:39:051
1040699150,14cyclictest0-21swapper/710:22:267
1040699150,14cyclictest0-21swapper/708:13:577
1040699150,14cyclictest0-21swapper/707:58:337
1040699150,14cyclictest0-21swapper/707:33:167
1040599150,14cyclictest0-21swapper/610:20:316
1040599150,14cyclictest0-21swapper/610:17:016
1040599150,14cyclictest0-21swapper/608:09:036
1040499150,14cyclictest0-21swapper/509:12:445
10402991512,2cyclictest0-21swapper/307:26:503
1040299150,14cyclictest0-21swapper/310:20:533
1040299150,14cyclictest0-21swapper/310:17:023
1040299150,14cyclictest0-21swapper/309:38:423
1040299150,14cyclictest0-21swapper/307:21:523
1040299150,14cyclictest0-21swapper/306:34:023
1040299150,14cyclictest0-21swapper/306:34:023
10401991512,2cyclictest0-21swapper/209:19:502
10401991512,2cyclictest0-21swapper/207:26:442
1040199150,14cyclictest0-21swapper/210:20:182
1040199150,14cyclictest0-21swapper/210:17:062
1040199150,14cyclictest0-21swapper/208:21:122
1040199150,14cyclictest0-21swapper/207:57:202
1040199150,14cyclictest0-21swapper/207:20:032
1040199150,14cyclictest0-21swapper/207:13:432
1040099150,14cyclictest0-21swapper/110:02:291
1040099150,14cyclictest0-21swapper/109:02:501
1040099150,14cyclictest0-21swapper/107:29:491
1040099150,14cyclictest0-21swapper/107:22:171
1040099150,14cyclictest0-21swapper/105:53:491
1039999150,14cyclictest0-21swapper/009:03:110
10406991411,2cyclictest0-21swapper/707:18:197
10406991411,2cyclictest0-21swapper/706:58:457
1040699140,13cyclictest0-21swapper/710:18:017
1040699140,13cyclictest0-21swapper/709:50:407
1040699140,13cyclictest0-21swapper/709:47:247
1040699140,13cyclictest0-21swapper/708:09:017
1040699140,13cyclictest0-21swapper/706:34:087
1040699140,13cyclictest0-21swapper/706:34:087
10405991411,2cyclictest0-21swapper/610:07:086
10405991411,2cyclictest0-21swapper/607:24:416
1040599140,13cyclictest0-21swapper/609:12:516
1040599140,13cyclictest0-21swapper/608:33:236
1040599140,13cyclictest0-21swapper/607:29:446
1040599140,13cyclictest0-21swapper/607:13:416
10404991411,2cyclictest0-21swapper/510:06:515
10404991411,2cyclictest0-21swapper/509:19:565
10404991411,2cyclictest0-21swapper/508:39:025
10404991411,2cyclictest0-21swapper/507:24:395
1040499140,13cyclictest0-21swapper/509:38:435
1040499140,13cyclictest0-21swapper/508:09:035
1040499140,13cyclictest0-21swapper/508:03:585
1040499140,13cyclictest0-21swapper/507:57:595
1040499140,13cyclictest0-21swapper/507:29:495
10403991411,2cyclictest0-21swapper/410:17:284
10403991411,2cyclictest0-21swapper/410:08:244
10403991411,2cyclictest0-21swapper/407:14:034
10403991411,2cyclictest0-21swapper/406:34:054
10403991411,2cyclictest0-21swapper/406:34:054
1040399140,13cyclictest0-21swapper/408:19:504
1040399140,13cyclictest0-21swapper/408:03:594
1040399140,13cyclictest0-21swapper/407:33:184
1040399140,13cyclictest0-21swapper/407:18:504
10402991411,2cyclictest0-21swapper/309:52:553
10402991411,2cyclictest0-21swapper/307:18:363
1040299140,13cyclictest0-21swapper/309:48:233
1040299140,13cyclictest0-21swapper/309:23:493
1040299140,13cyclictest0-21swapper/308:20:013
1040299140,13cyclictest0-21swapper/308:03:573
1040299140,13cyclictest0-21swapper/307:58:353
1040299140,13cyclictest0-21swapper/306:58:583
10401991411,2cyclictest0-21swapper/210:07:372
10401991411,2cyclictest0-21swapper/208:41:552
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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