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2023-01-27 - 15:52

x86 Intel Core i7-3770 @3400 MHz, Linux 3.18.69-rt75 (Profile)

Latency plot of system in rack #8, slot #5
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100, Linux 4.9.20-rt16, x86_64 highest latencies:
System rack8slot5.osadl.org (updated Fri Jan 27, 2023 12:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1344027655,8sleep40-21swapper/401:48:444
1339527352,8sleep50-21swapper/501:48:055
1347226847,8sleep70-21swapper/701:49:117
1339626544,8sleep60-21swapper/601:48:066
1338225544,8sleep10-21swapper/101:47:531
1332825537,14sleep30-21swapper/301:47:073
1332725331,8sleep20-21swapper/201:47:062
335299520,46rtkit-daemon0-21swapper/001:50:480
1386199170,16cyclictest0-21swapper/602:46:376
13821991712,4cyclictest0-21swapper/102:11:361
13853991613,2cyclictest0-21swapper/504:43:235
13853991613,2cyclictest0-21swapper/504:22:455
13853991611,3cyclictest180650irq/27-eth004:04:405
1383599160,15cyclictest0-21swapper/305:31:283
1381799160,15cyclictest0-21swapper/004:02:030
13869991511,2cyclictest0-21swapper/704:20:127
13853991512,2cyclictest0-21swapper/506:16:155
13853991512,2cyclictest0-21swapper/502:41:355
1385399150,14cyclictest0-21swapper/506:39:375
1385399150,14cyclictest0-21swapper/506:16:045
1385399150,14cyclictest0-21swapper/505:43:145
13835991512,2cyclictest0-21swapper/306:46:353
13829991512,2cyclictest0-21swapper/206:45:102
1382199150,14cyclictest0-21swapper/106:54:481
1381799150,14cyclictest0-21swapper/005:24:040
13869991411,2cyclictest0-21swapper/706:46:387
13869991411,2cyclictest0-21swapper/704:36:217
13869991411,2cyclictest0-21swapper/704:21:287
13861991411,2cyclictest0-21swapper/606:46:576
13861991411,2cyclictest0-21swapper/606:45:116
13861991411,2cyclictest0-21swapper/604:46:556
1386199140,13cyclictest0-21swapper/606:32:386
1386199140,13cyclictest0-21swapper/606:16:206
1386199140,13cyclictest0-21swapper/606:01:396
1386199140,13cyclictest0-21swapper/605:59:056
1386199140,13cyclictest0-21swapper/604:43:406
13853991411,2cyclictest0-21swapper/506:52:255
13853991411,2cyclictest0-21swapper/506:42:495
13853991411,2cyclictest0-21swapper/504:31:495
13853991411,2cyclictest0-21swapper/504:11:165
13853991411,2cyclictest0-21swapper/502:26:405
1385399140,13cyclictest0-21swapper/506:26:135
1385399140,13cyclictest0-21swapper/506:25:245
1385399140,13cyclictest0-21swapper/503:26:335
13835991412,2cyclictest0-21swapper/304:20:103
13835991411,2cyclictest0-21swapper/306:46:053
13835991411,2cyclictest0-21swapper/304:47:223
13835991411,2cyclictest0-21swapper/304:42:483
13835991411,2cyclictest0-21swapper/304:36:153
1383599140,13cyclictest0-21swapper/305:51:503
1383599140,13cyclictest0-21swapper/304:05:123
13829991412,2cyclictest0-21swapper/207:01:382
13829991412,2cyclictest0-21swapper/205:41:352
13829991412,2cyclictest0-21swapper/204:22:462
13829991411,2cyclictest0-21swapper/206:05:532
13829991411,2cyclictest0-21swapper/205:34:112
13829991411,2cyclictest0-21swapper/205:16:372
13829991411,2cyclictest0-21swapper/204:20:262
1382999140,13cyclictest0-21swapper/205:59:032
13821991411,2cyclictest0-21swapper/106:42:511
13821991411,2cyclictest0-21swapper/106:11:321
13821991411,2cyclictest0-21swapper/104:46:541
13821991411,2cyclictest0-21swapper/104:43:111
13821991411,2cyclictest0-21swapper/104:21:541
13821991411,2cyclictest0-21swapper/103:54:121
1382199140,13cyclictest0-21swapper/107:08:081
1382199140,13cyclictest0-21swapper/106:39:411
13817991412,2cyclictest0-21swapper/006:21:460
13817991412,2cyclictest0-21swapper/005:51:400
13817991411,2cyclictest0-21swapper/004:47:060
13817991411,2cyclictest0-21swapper/004:31:480
13817991411,2cyclictest0-21swapper/004:11:200
13817991411,2cyclictest0-21swapper/003:54:010
13817991411,2cyclictest0-21swapper/003:46:330
13869991311,1cyclictest0-21swapper/706:45:137
13869991311,1cyclictest0-21swapper/705:42:087
13869991311,1cyclictest0-21swapper/704:48:207
1386999130,12cyclictest0-21swapper/702:11:437
1386199130,12cyclictest0-21swapper/605:06:136
13853991311,2cyclictest0-21swapper/506:50:165
13853991311,2cyclictest0-21swapper/506:05:505
13853991311,2cyclictest0-21swapper/505:34:085
13853991311,2cyclictest0-21swapper/504:47:165
13853991311,2cyclictest0-21swapper/503:54:115
13835991311,1cyclictest0-21swapper/305:42:093
1383599130,12cyclictest0-21swapper/306:16:023
1383599130,12cyclictest0-21swapper/306:01:193
1383599130,12cyclictest0-21swapper/303:06:363
13829991311,2cyclictest0-21swapper/205:11:172
13829991311,2cyclictest0-21swapper/204:46:422
13829991311,2cyclictest0-21swapper/204:43:062
13829991311,2cyclictest0-21swapper/203:54:042
13829991311,1cyclictest0-21swapper/206:46:582
1382999130,12cyclictest0-21swapper/206:25:072
1382999130,12cyclictest0-21swapper/204:04:322
13821991311,2cyclictest0-21swapper/105:56:371
13821991311,2cyclictest0-21swapper/105:42:061
13821991311,2cyclictest0-21swapper/104:26:291
13821991311,1cyclictest0-21swapper/105:34:081
13821991311,1cyclictest0-21swapper/105:16:321
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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