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2022-11-30 - 01:50

x86 Intel Core i7-3770 @3400 MHz, Linux 3.18.69-rt75 (Profile)

Latency plot of system in rack #8, slot #5
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100, highest latencies:
System rack8slot5.osadl.org (updated Tue Nov 29, 2022 12:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2259627856,9sleep40-21swapper/402:43:144
2233226443,8sleep50-21swapper/502:39:315
2239026241,8sleep70-21swapper/702:40:217
2258826039,8sleep60-21swapper/602:43:086
2232725736,8sleep00-21swapper/002:39:260
2246125534,8sleep30-21swapper/302:41:213
2232025433,8sleep20-21swapper/202:39:202
2243225332,8sleep10-21swapper/102:40:551
17322330,0sleep12419-21runrttasks06:27:441
2283399170,16cyclictest0-21swapper/708:03:447
22788991715,1cyclictest27645-21ssh04:50:011
2283399160,15cyclictest0-21swapper/706:00:327
2281899160,15cyclictest0-21swapper/508:10:015
2281899160,15cyclictest0-21swapper/506:00:075
2281099160,15cyclictest0-21swapper/405:03:354
2281099160,15cyclictest0-21swapper/404:44:264
22794991613,2cyclictest0-21swapper/206:34:052
22788991613,2cyclictest0-21swapper/106:29:461
2278099160,15cyclictest0-21swapper/004:49:350
2281899150,14cyclictest0-21swapper/506:56:485
22810991513,1cyclictest0-21swapper/406:42:154
2281099150,14cyclictest0-21swapper/404:49:424
22794991512,2cyclictest0-21swapper/205:19:382
22794991512,2cyclictest0-21swapper/205:19:382
2279499150,14cyclictest0-21swapper/206:56:342
2279499150,14cyclictest0-21swapper/206:52:252
2279499150,14cyclictest0-21swapper/205:58:442
2279499150,14cyclictest0-21swapper/204:48:422
2279499150,14cyclictest0-21swapper/204:23:462
2278899150,14cyclictest0-21swapper/106:00:061
2278899150,14cyclictest0-21swapper/104:44:241
2278099150,14cyclictest0-21swapper/004:44:290
22833991411,2cyclictest0-21swapper/706:34:477
22833991411,2cyclictest0-21swapper/705:43:367
22833991411,2cyclictest0-21swapper/705:43:367
2283399140,13cyclictest0-21swapper/707:28:197
2283399140,13cyclictest0-21swapper/706:52:357
2283399140,13cyclictest0-21swapper/706:03:497
2283399140,13cyclictest0-21swapper/704:43:287
22825991411,2cyclictest0-21swapper/606:48:336
22825991411,2cyclictest0-21swapper/606:34:146
22825991411,2cyclictest0-21swapper/606:25:296
22825991411,2cyclictest0-21swapper/606:18:276
22825991411,2cyclictest0-21swapper/605:58:296
2282599140,13cyclictest0-21swapper/608:06:286
2282599140,13cyclictest0-21swapper/607:00:446
2282599140,13cyclictest0-21swapper/604:49:406
2282599140,13cyclictest0-21swapper/602:48:496
22818991411,2cyclictest0-21swapper/507:51:495
22818991411,2cyclictest0-21swapper/506:48:255
22818991411,2cyclictest0-21swapper/506:25:225
22818991411,2cyclictest0-21swapper/506:13:125
22818991411,2cyclictest0-21swapper/506:06:065
2281899140,13cyclictest0-21swapper/505:51:275
2281899140,13cyclictest0-21swapper/505:10:265
2281899140,13cyclictest0-21swapper/504:23:495
22810991411,2cyclictest0-21swapper/408:07:324
22810991411,2cyclictest0-21swapper/406:48:374
22810991411,2cyclictest0-21swapper/406:13:164
2281099140,13cyclictest0-21swapper/408:08:424
2281099140,13cyclictest0-21swapper/407:02:354
2281099140,13cyclictest0-21swapper/406:43:534
22802991411,2cyclictest0-21swapper/306:34:413
22802991411,2cyclictest0-21swapper/305:58:323
22802991411,2cyclictest0-21swapper/305:19:433
22802991411,2cyclictest0-21swapper/305:19:433
2280299140,13cyclictest0-21swapper/308:09:493
2280299140,13cyclictest0-21swapper/307:39:113
2280299140,13cyclictest0-21swapper/307:25:043
2280299140,13cyclictest0-21swapper/307:08:303
2280299140,13cyclictest0-21swapper/306:56:513
2280299140,13cyclictest0-21swapper/306:52:363
2280299140,13cyclictest0-21swapper/304:52:203
2280299140,13cyclictest0-21swapper/304:43:343
22794991411,2cyclictest0-21swapper/207:53:452
22794991411,2cyclictest0-21swapper/206:18:272
2279499140,13cyclictest0-21swapper/208:09:502
2279499140,13cyclictest0-21swapper/207:02:002
2279499140,13cyclictest0-21swapper/205:35:262
2278899140,13cyclictest0-21swapper/108:09:271
2278899140,13cyclictest0-21swapper/108:06:411
2278899140,13cyclictest0-21swapper/107:35:591
2278899140,13cyclictest0-21swapper/106:53:321
2278899140,13cyclictest0-21swapper/106:52:531
2278899140,13cyclictest0-21swapper/106:06:311
2278899140,13cyclictest0-21swapper/105:50:051
22780991411,2cyclictest0-21swapper/006:25:170
22780991411,2cyclictest0-21swapper/005:43:330
22780991411,2cyclictest0-21swapper/005:43:330
2278099140,13cyclictest0-21swapper/008:09:220
2278099140,13cyclictest0-21swapper/006:08:230
2278099140,13cyclictest0-21swapper/005:50:070
2278099140,13cyclictest0-21swapper/005:35:240
2283399130,12cyclictest0-21swapper/708:09:497
2283399130,12cyclictest0-21swapper/707:53:387
2283399130,12cyclictest0-21swapper/706:56:537
2283399130,12cyclictest0-21swapper/705:49:537
22825991311,2cyclictest0-21swapper/606:13:146
22825991311,2cyclictest0-21swapper/605:19:386
22825991311,2cyclictest0-21swapper/605:19:386
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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