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2023-03-28 - 07:41

x86 Intel Core i7-3770 @3400 MHz, Linux 3.18.69-rt75 (Profile)

Latency plot of system in rack #8, slot #5
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100, highest latencies:
System rack8slot5.osadl.org (updated Tue Mar 28, 2023 00:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1256728654,8sleep40-21swapper/412:56:434
1260527857,8sleep60-21swapper/612:57:176
1253027352,8sleep50-21swapper/512:56:125
1248327151,7sleep70-21swapper/712:55:347
1245926141,7sleep30-21swapper/312:55:143
1242925331,8sleep00-21swapper/012:54:460
1258224837,8sleep10-21swapper/112:56:561
1254524635,8sleep20-21swapper/212:56:252
12837991715,1cyclictest4665-21ssh18:21:211
1284399120,11cyclictest0-21swapper/618:01:336
1284399120,0cyclictest24566-21sh18:09:036
1284399110,1cyclictest0-21swapper/617:17:286
1284399110,1cyclictest0-21swapper/617:04:376
1284399110,1cyclictest0-21swapper/615:41:216
1284299110,10cyclictest0-21swapper/516:15:305
1283699112,5cyclictest0-21swapper/014:03:420
1284399104,5cyclictest29829-21sh15:46:196
1284399104,5cyclictest25042-21sh16:41:106
1284399104,5cyclictest14643-21ssh16:02:266
1284399103,6cyclictest31533-21sh16:47:506
1284399100,9cyclictest0-21swapper/615:49:176
1284399100,10cyclictest0-21swapper/616:33:586
1284299100,9cyclictest0-21swapper/517:22:425
1284299100,9cyclictest0-21swapper/515:55:005
1284199100,9cyclictest0-21swapper/417:36:404
33529990,1rtkit-daemon3351-21rtkit-daemon16:58:544
33529990,1rtkit-daemon3351-21rtkit-daemon16:44:394
33529990,1rtkit-daemon3351-21rtkit-daemon15:30:114
128459996,2cyclictest0-21swapper/717:50:427
128459990,8cyclictest0-21swapper/718:21:047
128459990,8cyclictest0-21swapper/718:01:227
128459990,8cyclictest0-21swapper/716:39:127
128459990,8cyclictest0-21swapper/715:48:137
128459990,8cyclictest0-21swapper/715:37:107
128439993,5cyclictest11424-21pmu-power15:29:056
128439992,6cyclictest6611-21gltestperf17:23:516
128439992,6cyclictest12294-21needreboot16:58:536
128439991,7cyclictest3702-21ssh17:50:216
128439991,7cyclictest15366-21ssh16:33:006
128439990,8cyclictest0-21swapper/617:55:266
128439990,8cyclictest0-21swapper/616:12:536
128439990,6cyclictest0-21swapper/618:28:026
128439990,6cyclictest0-21swapper/615:13:196
128439990,6cyclictest0-21swapper/613:33:056
128439990,5cyclictest17866-21ssh15:05:196
128439990,5cyclictest17866-21ssh15:05:196
128439990,5cyclictest0-21swapper/618:19:206
128439990,5cyclictest0-21swapper/618:13:486
128439990,5cyclictest0-21swapper/618:03:526
128439990,5cyclictest0-21swapper/617:45:356
128439990,5cyclictest0-21swapper/617:38:476
128439990,5cyclictest0-21swapper/617:36:586
128439990,5cyclictest0-21swapper/617:20:276
128439990,5cyclictest0-21swapper/615:35:476
128439990,5cyclictest0-21swapper/615:24:456
128439990,5cyclictest0-21swapper/615:19:386
128439990,5cyclictest0-21swapper/615:14:006
128439990,5cyclictest0-21swapper/614:53:506
128439990,5cyclictest0-21swapper/614:45:106
128439990,5cyclictest0-21swapper/614:38:406
128439990,5cyclictest0-21swapper/614:05:066
128439990,5cyclictest0-21swapper/614:01:086
128439990,5cyclictest0-21swapper/613:23:546
128439990,5cyclictest0-21swapper/613:18:386
128439990,1cyclictest0-21swapper/615:55:536
128439990,1cyclictest0-21swapper/615:02:516
128439990,1cyclictest0-21swapper/614:39:406
128429996,2cyclictest0-21swapper/515:25:095
128429990,8cyclictest0-21swapper/518:04:395
128429990,8cyclictest0-21swapper/516:55:005
128429990,8cyclictest0-21swapper/516:29:175
128429990,8cyclictest0-21swapper/516:23:195
128429990,8cyclictest0-21swapper/516:04:115
128429990,8cyclictest0-21swapper/515:33:435
128429990,8cyclictest0-21swapper/515:30:305
128429990,8cyclictest0-21swapper/515:12:085
128419990,8cyclictest0-21swapper/416:41:374
128419990,8cyclictest0-21swapper/416:35:204
128419990,8cyclictest0-21swapper/416:16:214
128419990,8cyclictest0-21swapper/415:50:114
128419990,8cyclictest0-21swapper/415:43:274
128419990,8cyclictest0-21swapper/415:13:454
128419990,8cyclictest0-21swapper/415:09:194
128409994,5cyclictest17063-21kworker/3:215:40:163
128409993,5cyclictest2356-21qpidd15:05:093
128409993,5cyclictest2356-21qpidd15:05:093
128389990,8cyclictest0-21swapper/217:26:162
128389990,8cyclictest0-21swapper/217:07:172
128389990,8cyclictest0-21swapper/217:02:052
128389990,8cyclictest0-21swapper/216:16:472
128389990,8cyclictest0-21swapper/215:21:502
128389990,8cyclictest0-21swapper/215:04:292
128389990,8cyclictest0-21swapper/215:04:292
128389990,8cyclictest0-21swapper/213:09:072
128389990,2cyclictest0-21swapper/215:52:452
128369997,1cyclictest0-21swapper/018:05:080
128369990,8cyclictest0-21swapper/017:01:460
128369990,8cyclictest0-21swapper/016:55:110
128369990,8cyclictest0-21swapper/016:19:590
128369990,8cyclictest0-21swapper/016:17:030
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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