You are here: Home / Projects / QA Farm Realtime / Latency plots / 
2021-06-17 - 18:37

Intel(R) Core(TM) i7-3770 CPU @ 3.40GHz, Linux 3.18.69-rt75 (Profile)

Latency plot of system in rack #8, slot #5
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack8slot5.osadl.org (updated Thu Jun 17, 2021 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1376528867,8sleep60-21swapper/605:08:116
1191128665,8sleep40-21swapper/405:07:454
1376328564,8sleep50-21swapper/505:08:105
1279427443,8sleep70-21swapper/705:07:567
1403526747,7sleep30-21swapper/305:12:013
1388925837,8sleep00-21swapper/005:09:580
1395725343,7sleep20-21swapper/205:10:562
1395625342,8sleep10-21swapper/105:10:551
14275991613,2cyclictest0-21swapper/707:38:407
1422699160,15cyclictest0-21swapper/109:28:451
1422699160,15cyclictest0-21swapper/107:33:311
14259991513,2cyclictest0-21swapper/509:44:285
14259991512,2cyclictest0-21swapper/509:09:395
1425199150,14cyclictest0-21swapper/407:32:444
14226991512,2cyclictest0-21swapper/108:20:251
1422699150,14cyclictest0-21swapper/108:45:011
1422699150,14cyclictest0-21swapper/107:13:051
14275991411,2cyclictest0-21swapper/709:44:357
14275991411,2cyclictest0-21swapper/709:36:227
14275991411,2cyclictest0-21swapper/709:19:187
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional