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2023-12-11 - 03:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack8slot5.osadl.org (updated Sun Dec 10, 2023 12:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2965226027,8sleep70-21swapper/704:07:407
3027525231,18sleep30-21swapper/304:10:003
3025825229,10sleep60-21swapper/604:09:476
3017225231,8sleep50-21swapper/504:08:345
3020125129,9sleep40-21swapper/404:08:574
3039525029,8sleep00-21swapper/004:11:410
3035825030,7sleep10-21swapper/104:11:101
2822724231,8sleep20-21swapper/204:07:272
3055999160,15cyclictest0-21swapper/607:59:396
3055999160,15cyclictest0-21swapper/606:51:426
30558991613,2cyclictest0-21swapper/507:42:185
30558991613,2cyclictest0-21swapper/507:33:005
3055899160,15cyclictest0-21swapper/508:22:425
3055899160,15cyclictest0-21swapper/508:07:325
3055899160,15cyclictest0-21swapper/507:53:555
3055899160,15cyclictest0-21swapper/507:16:415
3055899160,15cyclictest0-21swapper/506:32:275
30560991512,2cyclictest0-21swapper/709:12:257
3056099150,14cyclictest0-21swapper/706:12:237
30559991512,2cyclictest0-21swapper/605:42:306
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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