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2019-07-16 - 02:11

Intel(R) Core(TM) i7-3770 CPU @ 3.40GHz, Linux 3.18.69-rt75 (Profile)

Latency plot of system in rack #8, slot #5
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack8slot5.osadl.org (updated Mon Jul 15, 2019 00:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1045425931,15sleep70-21swapper/718:47:517
351299540,26rtkit-daemon0-21swapper/418:52:014
1082425029,8sleep30-21swapper/318:48:113
1033424927,8sleep60-21swapper/618:47:506
1096424827,8sleep00-21swapper/018:50:080
1100624726,8sleep20-21swapper/218:50:422
1087924626,8sleep10-21swapper/118:48:571
1091424029,8sleep50-21swapper/518:49:255
1126599100,9cyclictest0-21swapper/721:40:187
1124899100,9cyclictest0-21swapper/421:35:504
1124699103,3cyclictest0-21swapper/223:19:192
1124699102,4cyclictest0-21swapper/221:51:482
1124699100,9cyclictest0-21swapper/200:04:042
1124599100,9cyclictest0-21swapper/123:09:151
1124599100,9cyclictest0-21swapper/119:37:391
112659998,1cyclictest0-21swapper/723:47:297
112659990,9cyclictest0-21swapper/722:26:047
112659990,8cyclictest31788-21rm23:28:407
112659990,8cyclictest0-21swapper/722:49:387
112659990,8cyclictest0-21swapper/722:18:527
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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