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2025-12-16 - 00:46

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #8, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot6s.osadl.org (updated Mon Dec 15, 2025 12:43:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3222992626,0cyclictest23924-21fwupd09:17:313
3222991919,0cyclictest65850irq/126-lan11:35:253
3222991918,1cyclictest65850irq/126-lan11:49:253
3222991918,1cyclictest65850irq/126-lan08:21:133
3215991918,1cyclictest743-21snmpd11:11:011
3222991818,0cyclictest65850irq/126-lan11:51:013
3222991818,0cyclictest65850irq/126-lan07:40:343
3222991818,0cyclictest440-21hwrng11:07:543
3222991817,1cyclictest65850irq/126-lan11:10:173
3222991817,1cyclictest65850irq/126-lan08:25:143
3215991818,0cyclictest743-21snmpd12:39:111
3215991818,0cyclictest743-21snmpd10:25:211
3215991818,0cyclictest743-21snmpd09:18:491
3215991818,0cyclictest743-21snmpd08:03:501
3222991717,0cyclictest65850irq/126-lan12:30:143
3222991717,0cyclictest65850irq/126-lan11:40:213
3222991717,0cyclictest65850irq/126-lan10:55:153
3222991717,0cyclictest65850irq/126-lan07:30:133
3222991716,1cyclictest65850irq/126-lan12:35:183
3222991716,1cyclictest65850irq/126-lan12:25:143
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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