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2025-07-12 - 11:05

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #8, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot6s.osadl.org (updated Sat Jul 12, 2025 00:43:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
24806994444,0cyclictest12512-21fwupd21:42:181
24814991919,0cyclictest66850irq/125-lan21:55:253
24814991918,1cyclictest66850irq/125-lan22:25:133
24814991918,1cyclictest66850irq/125-lan21:51:403
24814991918,1cyclictest66850irq/125-lan21:15:173
24814991918,1cyclictest66850irq/125-lan19:55:163
24814991918,1cyclictest66850irq/125-lan00:21:143
24814991918,1cyclictest66850irq/125-lan00:15:173
24814991818,0cyclictest66850irq/125-lan23:35:053
24814991818,0cyclictest66850irq/125-lan23:10:183
24814991818,0cyclictest66850irq/125-lan22:46:253
24814991818,0cyclictest66850irq/125-lan22:15:243
24814991818,0cyclictest66850irq/125-lan22:11:483
24814991818,0cyclictest66850irq/125-lan21:44:523
24814991818,0cyclictest66850irq/125-lan21:26:023
24814991818,0cyclictest66850irq/125-lan21:05:193
24814991818,0cyclictest66850irq/125-lan19:20:193
24814991818,0cyclictest66850irq/125-lan19:10:123
24814991817,1cyclictest66850irq/125-lan22:05:223
24814991817,1cyclictest66850irq/125-lan22:00:243
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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