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2025-03-16 - 23:44

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #8, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot6s.osadl.org (updated Sun Mar 16, 2025 12:43:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
5711994646,0cyclictest7379-21fwupd08:48:272
5707992019,1cyclictest65850irq/126-lan10:44:181
5707992019,1cyclictest65850irq/126-lan10:44:171
5707991919,0cyclictest65850irq/126-lan10:32:391
5707991918,1cyclictest65850irq/126-lan12:32:071
5707991918,1cyclictest65850irq/126-lan12:20:381
5707991918,1cyclictest65850irq/126-lan11:30:191
5707991918,1cyclictest65850irq/126-lan10:15:271
5707991918,1cyclictest65850irq/126-lan09:35:161
5707991918,1cyclictest65850irq/126-lan09:15:221
5711991816,2cyclictest765-21snmpd11:14:512
5707991818,0cyclictest65850irq/126-lan11:50:091
5707991818,0cyclictest65850irq/126-lan09:55:431
5707991818,0cyclictest65850irq/126-lan08:50:181
5707991818,0cyclictest65850irq/126-lan08:35:131
5707991817,1cyclictest65850irq/126-lan12:14:391
5707991817,1cyclictest65850irq/126-lan12:05:221
5707991817,1cyclictest65850irq/126-lan11:56:271
5707991817,1cyclictest65850irq/126-lan11:25:011
5707991817,1cyclictest65850irq/126-lan10:06:181
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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