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2023-06-04 - 07:01

x86 Intel Celeron G1620 @2700 MHz, Linux 5.15.96-rt61 (Profile)

Latency plot of system in rack #8, slot #7
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack8slot7.osadl.org (updated Sun Jun 04, 2023 00:43:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
8081992421,2cyclictest15214-21ssh00:35:311
808099240,24cyclictest0-21swapper/023:35:410
808099240,23cyclictest0-21swapper/021:57:310
808099230,2cyclictest612-21irqbalance21:31:310
808099210,21cyclictest0-21swapper/023:22:420
8080992019,1cyclictest0-21swapper/023:07:420
8080991918,1cyclictest0-21swapper/022:50:520
8081991615,1cyclictest0-21swapper/100:31:111
8080991615,1cyclictest0-21swapper/023:34:010
8080991615,1cyclictest0-21swapper/022:23:410
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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