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2023-12-07 - 22:06

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #8, slot #7

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack8slot7s.osadl.org (updated Thu Dec 07, 2023 12:43:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2755199350,35cyclictest30037-21meminfo11:40:240
2755199350,35cyclictest20941-21meminfo11:15:270
2755199330,32cyclictest31154-21meminfo08:45:280
2755199320,32cyclictest5520-21meminfo07:35:240
2755199320,32cyclictest18409-21meminfo08:10:230
2755199310,31cyclictest32400-21meminfo07:20:240
2755199310,31cyclictest24577-21meminfo11:25:260
2755199310,31cyclictest12959-21meminfo07:55:240
2755199300,30cyclictest8212-21meminfo10:40:220
2755199300,30cyclictest26038-21meminfo10:00:250
2755199290,29cyclictest6748-21meminfo12:05:250
2755199290,29cyclictest27507-21meminfo08:35:250
2755199290,29cyclictest22047-21meminfo08:20:240
2755199290,29cyclictest16949-21meminfo09:35:240
2755199280,28cyclictest9328-21meminfo07:45:270
2755199280,28cyclictest2764-21meminfo10:25:270
2755199280,28cyclictest17304-21meminfo11:05:260
2755199280,28cyclictest11142-21meminfo07:50:250
2755199280,28cyclictest10388-21meminfo12:15:250
2755199270,27cyclictest6044-21meminfo09:05:270
2755199270,27cyclictest6044-21meminfo09:05:270
2755199260,26cyclictest7861-21meminfo09:10:250
2755199260,26cyclictest508-21meminfo08:50:280
2755199260,26cyclictest29678-21meminfo10:10:240
2755199260,26cyclictest23871-21meminfo08:25:260
2755199260,26cyclictest14028-21meminfo12:25:260
2755199250,25cyclictest31500-21meminfo10:15:250
2755199250,25cyclictest27861-21meminfo10:05:260
2755199250,25cyclictest22402-21meminfo09:50:230
2755199250,25cyclictest18765-21meminfo09:40:230
2755199240,24cyclictest3663-21meminfo07:30:240
2755199230,23cyclictest19123-21meminfo11:10:250
2755199230,23cyclictest11852-21meminfo10:50:250
2700622315,5sleep10-21swapper/107:06:101
2755199220,22cyclictest4933-21meminfo12:00:240
2755199220,22cyclictest28213-21meminfo11:35:230
2755199220,22cyclictest15487-21meminfo11:00:250
2755199220,22cyclictest15135-21meminfo09:30:250
2755199220,22cyclictest1270-21meminfo11:50:250
2755199210,21cyclictest6398-21meminfo10:35:250
2755199210,21cyclictest20227-21meminfo08:15:240
2755199200,20cyclictest31854-21meminfo11:45:240
2755199200,20cyclictest30585-21meminfo07:15:260
2755199200,20cyclictest1832-21meminfo07:25:240
2755199190,19cyclictest2406-21meminfo08:55:250
2755299180,9cyclictest0-21swapper/110:29:571
2755199180,18cyclictest29327-21meminfo08:40:260
2755199180,18cyclictest25687-21meminfo08:30:270
2755199180,18cyclictest14777-21meminfo08:00:240
2755199180,18cyclictest12209-21meminfo12:20:250
2755299172,14cyclictest0-21swapper/109:29:021
2755199170,17cyclictest22753-21meminfo11:20:210
2755199170,17cyclictest17661-21meminfo12:35:260
2755199170,17cyclictest15843-21meminfo12:30:240
2755199170,17cyclictest13325-21meminfo09:25:290
2755199160,16cyclictest7339-21meminfo07:40:230
2755199160,16cyclictest4581-21meminfo10:30:250
27552991514,1cyclictest0-21swapper/110:45:281
2755199150,15cyclictest888-21meminfo10:20:250
2755299143,5cyclictest0-21swapper/110:20:291
2755299142,6cyclictest0-21swapper/112:15:221
2755299142,6cyclictest0-21swapper/111:39:271
2755299142,5cyclictest0-21swapper/112:25:251
2755299140,5cyclictest0-21swapper/111:55:221
2755199140,14cyclictest26390-21meminfo11:30:240
2755199140,14cyclictest16593-21meminfo08:05:250
2755299134,5cyclictest0-21swapper/108:10:201
2755299132,8cyclictest0-21swapper/107:50:201
2755299132,6cyclictest0-21swapper/110:10:241
2755299132,5cyclictest0-21swapper/110:15:201
2755299132,4cyclictest0-21swapper/108:25:211
2755299131,8cyclictest0-21swapper/109:10:301
2755299130,6cyclictest0-21swapper/108:55:241
2755199130,13cyclictest28172-21meminfo07:10:240
272472131,9sleep01050-21nmbd07:08:450
2755299122,5cyclictest0-21swapper/109:35:001
2755299121,4cyclictest0-21swapper/108:15:211
2755299120,11cyclictest0-21swapper/110:45:001
2755199120,12cyclictest3119-21meminfo11:55:270
2755199120,12cyclictest24225-21meminfo09:55:280
2755199120,12cyclictest20584-21meminfo09:45:240
2755299114,4cyclictest0-21swapper/108:05:201
2755299113,6cyclictest0-21swapper/109:00:271
2755299112,4cyclictest0-21swapper/107:45:221
2755299111,5cyclictest0-21swapper/108:50:291
2755299111,5cyclictest0-21swapper/108:20:281
2755299111,3cyclictest0-21swapper/108:30:221
2755299110,4cyclictest0-21swapper/107:40:191
2755199110,11cyclictest9676-21meminfo09:15:230
2755199110,11cyclictest4219-21meminfo09:00:220
2755299106,2cyclictest0-21swapper/111:15:221
2755299102,6cyclictest0-21swapper/111:25:201
2755299102,6cyclictest0-21swapper/111:00:221
2755299102,5cyclictest0-21swapper/110:00:241
2755299102,5cyclictest0-21swapper/109:45:191
2755299102,3cyclictest0-21swapper/110:35:211
2755299101,6cyclictest0-21swapper/109:55:241
2755299100,4cyclictest0-21swapper/110:30:211
2755299100,3cyclictest0-21swapper/109:05:081
2755299100,3cyclictest0-21swapper/109:05:081
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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