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2025-09-09 - 16:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot7.osadl.org (updated Tue Sep 09, 2025 12:43:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4932993232,0cyclictest10746-21fwupd12:37:261
4937991918,1cyclictest60250irq/125-lan11:00:192
4937991918,1cyclictest60250irq/125-lan09:40:152
4937991918,1cyclictest60250irq/125-lan08:25:152
4937991918,1cyclictest60250irq/125-lan08:15:152
4937991918,1cyclictest60250irq/125-lan07:40:192
4937991918,1cyclictest60250irq/125-lan07:30:122
4937991817,1cyclictest60250irq/125-lan10:50:172
4937991817,1cyclictest60250irq/125-lan10:50:162
4937991817,1cyclictest60250irq/125-lan09:20:132
4937991816,1cyclictest60250irq/125-lan09:10:002
4937991717,0cyclictest60250irq/125-lan11:19:592
4937991717,0cyclictest60250irq/125-lan11:18:062
4937991717,0cyclictest60250irq/125-lan10:59:162
4937991717,0cyclictest60250irq/125-lan10:39:342
4937991717,0cyclictest60250irq/125-lan10:34:322
4937991717,0cyclictest60250irq/125-lan08:52:572
4937991716,1cyclictest60250irq/125-lan12:35:192
4937991716,1cyclictest60250irq/125-lan11:45:132
4937991716,1cyclictest60250irq/125-lan10:40:172
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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