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2019-07-16 - 02:12

Intel(R) Celeron(R) CPU G1620 @ 2.70GHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #8, slot #7
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot7.osadl.org (updated Mon Jul 15, 2019 00:43:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1154499107,2cyclictest29084-21x2golistsession00:15:221
115449986,1cyclictest4622-21x2golistsession19:52:321
115449986,1cyclictest19379-21x2golistsession19:21:471
115449986,1cyclictest13278-21x2golistsession19:10:461
115449986,1cyclictest0-21swapper/123:47:561
115449980,7cyclictest15372-21memory19:15:101
115449980,7cyclictest0-21swapper/123:25:521
115449980,7cyclictest0-21swapper/120:50:051
115449980,6cyclictest13872-21x2gosqlitewrapp21:05:031
115409980,7cyclictest9597-21x2gosqlitewrapp23:43:570
115409980,7cyclictest25209-21x2gosqlitewrapp19:31:500
115409980,7cyclictest1035-21x2gosqlitewrapp21:37:410
115449975,1cyclictest22-21ksoftirqd/123:10:031
115449974,2cyclictest18536-21x2golistsession22:07:411
115449974,2cyclictest1316-21lxpanel20:35:591
115449971,5cyclictest8948-21x2gosqlitewrapp23:41:261
115449971,5cyclictest675-21x2gosqlitewrapp22:32:311
115449971,5cyclictest6715-21x2gosqlitewrapp23:39:121
115449971,5cyclictest308-21x2gosqlitewrapp00:23:151
115449971,5cyclictest21911-21x2gosqlitewrapp19:25:171
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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