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2025-07-11 - 22:47
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot7.osadl.org (updated Fri Jul 11, 2025 12:43:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
25479993939,0cyclictest17231-21fwupd10:42:123
25474991917,2cyclictest60250irq/125-lan09:20:152
25474991916,3cyclictest60250irq/125-lan07:55:232
25474991818,0cyclictest60250irq/125-lan07:31:242
25474991817,1cyclictest60250irq/125-lan12:25:132
25474991817,1cyclictest60250irq/125-lan09:05:162
25474991817,1cyclictest60250irq/125-lan08:05:192
25474991817,1cyclictest60250irq/125-lan08:00:242
25474991817,1cyclictest60250irq/125-lan07:50:172
25474991816,2cyclictest60250irq/125-lan12:20:142
25474991814,1cyclictest60250irq/125-lan10:30:132
25474991717,0cyclictest60250irq/125-lan11:39:182
25474991717,0cyclictest60250irq/125-lan10:55:292
25474991717,0cyclictest60250irq/125-lan08:52:242
25474991716,1cyclictest60250irq/125-lan11:45:132
25474991716,1cyclictest60250irq/125-lan10:50:132
25474991716,1cyclictest60250irq/125-lan08:21:222
25474991715,1cyclictest60250irq/125-lan07:40:142
25474991615,1cyclictest60250irq/125-lan12:33:222
25474991615,1cyclictest60250irq/125-lan12:08:202
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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