You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2024-09-08 - 09:36
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack8slot7.osadl.org (updated Sun Sep 08, 2024 00:43:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
10945991919,0cyclictest60250irq/125-lan00:17:420
10945991919,0cyclictest329-21hwrng23:09:200
10945991918,1cyclictest60250irq/125-lan23:20:200
10945991918,1cyclictest60250irq/125-lan23:01:540
10945991918,1cyclictest60250irq/125-lan22:42:500
10945991918,1cyclictest60250irq/125-lan22:10:350
10945991918,1cyclictest60250irq/125-lan21:21:500
10945991918,1cyclictest60250irq/125-lan00:23:570
10945991818,0cyclictest60250irq/125-lan21:37:160
10945991818,0cyclictest60250irq/125-lan19:12:360
10945991818,0cyclictest60250irq/125-lan00:25:240
10945991818,0cyclictest60250irq/125-lan00:09:580
10945991817,1cyclictest60250irq/125-lan23:46:260
10945991817,1cyclictest60250irq/125-lan23:25:500
10945991817,1cyclictest60250irq/125-lan22:45:140
10945991817,1cyclictest60250irq/125-lan22:34:470
10945991817,1cyclictest60250irq/125-lan22:28:030
10945991817,1cyclictest60250irq/125-lan22:15:170
10945991817,1cyclictest60250irq/125-lan21:59:440
10945991817,1cyclictest60250irq/125-lan21:53:430
10945991817,1cyclictest60250irq/125-lan21:26:270
10945991817,1cyclictest60250irq/125-lan20:18:300
10945991817,1cyclictest60250irq/125-lan00:04:060
10945991717,0cyclictest60250irq/125-lan22:58:380
10945991717,0cyclictest60250irq/125-lan21:47:010
10945991717,0cyclictest60250irq/125-lan21:11:220
10945991717,0cyclictest60250irq/125-lan20:25:200
10945991717,0cyclictest60250irq/125-lan20:22:590
10945991717,0cyclictest60250irq/125-lan20:10:560
10945991717,0cyclictest60250irq/125-lan19:40:200
10945991717,0cyclictest60250irq/125-lan19:37:500
10945991717,0cyclictest60250irq/125-lan19:26:400
10945991717,0cyclictest60250irq/125-lan00:11:100
10945991716,1cyclictest60250irq/125-lan23:59:590
10945991716,1cyclictest60250irq/125-lan23:43:520
10945991716,1cyclictest60250irq/125-lan23:39:140
10945991716,1cyclictest60250irq/125-lan23:31:240
10945991716,1cyclictest60250irq/125-lan23:15:060
10945991716,1cyclictest60250irq/125-lan23:10:020
10945991716,1cyclictest60250irq/125-lan22:54:540
10945991716,1cyclictest60250irq/125-lan22:35:120
10945991716,1cyclictest60250irq/125-lan22:00:120
10945991716,1cyclictest60250irq/125-lan21:31:240
10945991716,1cyclictest60250irq/125-lan21:18:500
10945991716,1cyclictest60250irq/125-lan19:30:190
10945991616,0cyclictest60250irq/125-lan23:50:480
10945991616,0cyclictest60250irq/125-lan22:20:110
10945991616,0cyclictest60250irq/125-lan19:58:280
10945991616,0cyclictest60250irq/125-lan19:45:170
10945991615,1cyclictest60250irq/125-lan22:06:250
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional