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2024-09-12 - 09:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack9slot4.osadl.org (updated Thu Sep 12, 2024 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
23301113573sleep0-21swapper/112:46:541
24581111175sleep0-21swapper/012:47:160
248039910131cyclictest4615-21sshd13:24:390
24803999776cyclictest0-21swapper/013:07:510
24803999474cyclictest0-21swapper/013:57:520
24803999182cyclictest6950irq/18-mmc015:22:300
2480399918cyclictest0-21swapper/015:07:480
2480399908cyclictest0-21swapper/015:02:480
24803999068cyclictest0-21swapper/017:33:160
2480399899cyclictest0-21swapper/014:22:580
24803998965cyclictest0-21swapper/015:53:110
24803998867cyclictest0-21swapper/015:32:360
24803998812cyclictest0-21swapper/016:47:500
2480399879cyclictest0-21swapper/015:23:000
2480399877cyclictest0-21swapper/017:47:520
6950860irq/18-mmc00-21swapper/115:40:071
2480399869cyclictest0-21swapper/018:13:050
2480399869cyclictest0-21swapper/014:32:580
2480399868cyclictest0-21swapper/017:22:510
2480399859cyclictest0-21swapper/013:56:190
24803998511cyclictest31599-21latency_hist16:37:320
6950840irq/18-mmc00-21swapper/114:46:461
2480399848cyclictest0-21swapper/017:28:040
2480399848cyclictest0-21swapper/015:27:480
24803998463cyclictest0-21swapper/015:38:160
24803998460cyclictest0-21swapper/017:08:180
24803998460cyclictest0-21swapper/014:47:590
24803998411cyclictest0-21swapper/014:06:200
6950830irq/18-mmc00-21swapper/113:16:441
2480399839cyclictest0-21swapper/018:03:040
2480399839cyclictest0-21swapper/013:12:560
2480399838cyclictest0-21swapper/014:56:560
2480399838cyclictest0-21swapper/013:35:070
24803998371cyclictest0-21swapper/015:42:310
2480399837cyclictest0-21swapper/013:43:190
24803998310cyclictest0-21swapper/017:42:480
24803998310cyclictest0-21swapper/014:17:460
2480399829cyclictest0-21swapper/018:08:050
2480399829cyclictest0-21swapper/014:17:200
24803998272cyclictest74-21mmcqd/017:37:510
2480399819cyclictest0-21swapper/012:58:110
2480399818cyclictest0-21swapper/016:13:020
2480399818cyclictest0-21swapper/014:27:440
24803998169cyclictest0-21swapper/016:18:020
24803998159cyclictest0-21swapper/016:07:500
24803998110cyclictest0-21swapper/016:47:240
2480399809cyclictest0-21swapper/014:37:460
24803998072cyclictest6950irq/18-mmc012:47:480
24803998011cyclictest0-21swapper/017:17:340
2480399798cyclictest0-21swapper/016:52:500
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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