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2025-02-11 - 03:57
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack9slot4.osadl.org (updated Tue Feb 11, 2025 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
5025112680sleep0-21swapper/120:31:441
53429911810cyclictest0-21swapper/023:17:230
53429911613cyclictest13976-21cat00:52:110
53429911613cyclictest13976-21cat00:52:110
5342991108cyclictest0-21swapper/021:22:260
5342991108cyclictest0-21swapper/000:22:000
5342991098cyclictest0-21swapper/021:13:100
5342991098cyclictest0-21swapper/000:02:290
4724110972sleep0-21swapper/020:31:410
5342991078cyclictest0-21swapper/023:32:390
5342991078cyclictest0-21swapper/000:22:300
53429910612cyclictest32396-21latency_hist23:57:000
5342991058cyclictest0-21swapper/020:56:550
5342991044cyclictest20919-21sh21:21:550
53429910410cyclictest0-21swapper/023:52:000
5342991039cyclictest0-21swapper/020:51:540
5342991018cyclictest0-21swapper/001:37:030
5342991017cyclictest0-21swapper/001:57:210
5342991008cyclictest0-21swapper/022:58:080
534299997cyclictest0-21swapper/021:32:250
534299993cyclictest6545-21missed_timers22:17:270
534299988cyclictest0-21swapper/022:37:120
5342999875cyclictest0-21swapper/000:37:590
22150980irq/18-spi_topc534299cyclictest23:08:130
534299969cyclictest0-21swapper/020:32:090
534299959cyclictest0-21swapper/000:42:310
5342999544cyclictest21862-21latency_hist01:22:020
534299948cyclictest0-21swapper/021:01:550
534299928cyclictest31598-21sshd21:53:060
534299928cyclictest0-21swapper/023:12:170
534299928cyclictest0-21swapper/022:31:570
534299924cyclictest30360-21cat23:47:000
534299918cyclictest0-21swapper/021:02:050
5342999114cyclictest0-21swapper/001:39:170
5342999112cyclictest0-21swapper/022:12:370
534299909cyclictest0-21swapper/001:12:170
534299909cyclictest0-21swapper/000:57:320
534299908cyclictest0-21swapper/022:32:210
534299908cyclictest0-21swapper/022:02:120
534299908cyclictest0-21swapper/022:02:120
534299898cyclictest0-21swapper/022:51:580
534299898cyclictest0-21swapper/022:22:270
534299898cyclictest0-21swapper/020:46:540
5342998954cyclictest0-21swapper/021:45:320
5342998910cyclictest13634-21latency_hist00:52:020
534299889cyclictest0-21swapper/022:08:070
534299889cyclictest0-21swapper/001:48:180
534299889cyclictest0-21swapper/001:22:470
534299888cyclictest0-21swapper/021:37:090
534299887cyclictest0-21swapper/001:07:480
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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