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2023-09-30 - 12:46
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack9slot6.osadl.org (updated Sat Sep 30, 2023 00:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
13011213185sleep20-21swapper/219:06:132
13236212287sleep10-21swapper/119:09:061
13183211081sleep00-21swapper/019:08:250
13034210493sleep30-21swapper/319:06:303
13601993834cyclictest0-21swapper/200:20:532
13601993736cyclictest0-21swapper/200:14:582
13601993734cyclictest0-21swapper/221:46:542
13601993733cyclictest0-21swapper/221:51:212
13601993633cyclictest0-21swapper/200:30:032
13601993633cyclictest0-21swapper/200:15:572
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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