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2019-07-22 - 07:33

Intel(R) Core(TM) i3-4330T CPU @ 3.00GHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #9, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack9slot6.osadl.org (updated Mon Jul 22, 2019 00:43:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
6795210952,29sleep30-21swapper/319:07:303
6902210853,29sleep10-21swapper/119:08:531
503527351,15sleep00-21swapper/019:05:040
666326952,8sleep20-21swapper/219:05:492
7270992216,4cyclictest10677-21awk00:10:092
727199210,19cyclictest22865-21munin-run00:40:013
7270992016,2cyclictest4072-21/usr/sbin/munin20:15:092
7270992016,2cyclictest4072-21/usr/sbin/munin20:15:082
727199191,17cyclictest0-21swapper/320:53:373
727199191,17cyclictest0-21swapper/320:21:503
727199190,17cyclictest0-21swapper/322:55:103
726999190,18cyclictest0-21swapper/122:20:071
726999190,17cyclictest0-21swapper/122:50:131
726899190,17cyclictest0-21swapper/022:25:060
727199180,17cyclictest0-21swapper/321:30:073
727199180,16cyclictest0-21swapper/300:21:353
726999180,17cyclictest0-21swapper/120:05:501
726999180,17cyclictest0-21swapper/120:01:011
726999180,16cyclictest0-21swapper/122:33:491
726999180,16cyclictest0-21swapper/122:17:271
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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