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2025-06-13 - 19:25
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackaslot0.osadl.org (updated Fri Jun 13, 2025 12:44:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
322792960,2sleep0585899cyclictest11:40:220
322792960,2sleep0585899cyclictest11:40:220
325282920,1sleep332525-21cp09:51:003
20212910,0sleep00-21swapper/009:51:130
141752610,0sleep30-21swapper/310:30:223
186532600,0sleep00-21swapper/012:18:330
288312570,0sleep00-21swapper/011:25:050
61782540,0sleep30-21swapper/311:02:553
138412540,1sleep20-21swapper/212:15:062
84072530,0sleep20-21swapper/211:47:132
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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