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2023-01-28 - 01:17

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #a, slot #3

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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ARM Samsung Exynos5 @1300/2000 MHz, Linux 4.14.141-169 (Profile)

Latency plot of shadow in rack #a, slot #3
Note that this system runs a non-RT kernel.
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackaslot3s.osadl.org (updated Sat Mar 04, 2017 12:43:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1882399891416,8876cyclictest13627-21diskmemload09:46:250
1882399862820,8560cyclictest13627-21diskmemload09:30:540
1882399862018,8577cyclictest13627-21diskmemload09:41:590
1882699851219,8470cyclictest13627-21diskmemload12:29:091
1882399850816,8440cyclictest13627-21diskmemload11:55:280
1882399849118,8451cyclictest13627-21diskmemload12:21:540
1882799847115,8422cyclictest13627-21diskmemload09:16:332
1882399847121,8427cyclictest13627-21diskmemload12:29:210
1882399844416,8410cyclictest13627-21diskmemload11:09:130
1882399843212,8388cyclictest13627-21diskmemload12:01:390
1882399842916,8348cyclictest13627-21diskmemload10:21:460
1882399842515,8341cyclictest13627-21diskmemload10:01:430
1882399842118,8368cyclictest13627-21diskmemload09:15:160
1882799840714,8368cyclictest13627-21diskmemload11:25:362
1882799840515,8349cyclictest13627-21diskmemload12:10:442
1882399840215,8329cyclictest13627-21diskmemload09:55:210
1882699839417,8350cyclictest13627-21diskmemload09:10:331
1882799838714,8312cyclictest13627-21diskmemload11:47:212
1882399837917,8308cyclictest13627-21diskmemload09:20:450
1882399836717,8312cyclictest13627-21diskmemload11:14:180
1882699836219,8297cyclictest13627-21diskmemload11:45:281
1882699833915,8307cyclictest13627-21diskmemload10:16:201
1882999833615,8292cyclictest13627-21diskmemload11:35:363
1882399833613,8298cyclictest13627-21diskmemload10:06:550
1882399831618,8275cyclictest13627-21diskmemload12:35:460
1882399829516,8258cyclictest13627-21diskmemload10:16:450
1882799828713,8233cyclictest13627-21diskmemload10:19:012
1882399828515,8253cyclictest13627-21diskmemload11:19:120
1882399828416,8249cyclictest13627-21diskmemload10:13:380
1882399827515,8236cyclictest13627-21diskmemload09:39:060
1882699826817,8221cyclictest13627-21diskmemload09:20:211
1882399826116,8214cyclictest13627-21diskmemload10:41:260
1882699825722,8199cyclictest13627-21diskmemload09:12:521
1882699824019,8192cyclictest13627-21diskmemload12:31:271
1882399823516,8174cyclictest13627-21diskmemload11:36:460
1882399822719,8177cyclictest13627-21diskmemload12:16:350
1882799822414,8188cyclictest13627-21diskmemload10:30:352
1882399822415,8162cyclictest13627-21diskmemload12:31:210
1882399822415,8162cyclictest13627-21diskmemload10:51:560
1882799822316,8187cyclictest13627-21diskmemload09:26:202
1882399822017,8152cyclictest13627-21diskmemload10:25:580
1882399821349,8114cyclictest13627-21diskmemload10:49:590
1882799821214,8175cyclictest13627-21diskmemload10:57:172
1882799821114,8177cyclictest13627-21diskmemload11:10:062
1882699820617,8164cyclictest13627-21diskmemload09:55:371
1882799820413,8172cyclictest13627-21diskmemload09:21:052
1882799818916,8155cyclictest13627-21diskmemload12:37:412
1882799818214,8135cyclictest13627-21diskmemload09:38:302
1882799817915,8141cyclictest13627-21diskmemload11:11:362
1882999817615,8141cyclictest13627-21diskmemload12:00:413
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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