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2022-01-23 - 09:46

ARMv7 Processor rev 4 (v7l), Linux 4.6.5-rt10-v7 (Profile)

Latency plot of system in rack #b, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackbslot3.osadl.org (updated Fri Nov 19, 2021 00:43:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
28985999210,69cyclictest0-21swapper/019:40:010
2898599842,67cyclictest0-21swapper/019:50:030
2898599842,67cyclictest0-21swapper/019:50:030
28985998235,23cyclictest10750irq/39-dwc_otg_20:40:020
2898599792,4cyclictest0-21swapper/020:15:020
2898599792,4cyclictest0-21swapper/020:15:020
28986997816,17cyclictest30471-21cat19:45:021
2898599772,9cyclictest29635-21latency_hist19:25:030
2898599751,9cyclictest1278-21latency_hist20:50:030
2898599742,36cyclictest0-21swapper/020:35:030
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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