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2021-11-28 - 00:18

ARMv7 Processor rev 4 (v7l), Linux 4.6.5-rt10-v7 (Profile)

Latency plot of system in rack #b, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackbslot3.osadl.org (updated Fri Nov 19, 2021 00:43:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
28985999210,69cyclictest0-21swapper/019:40:010
2898599842,67cyclictest0-21swapper/019:50:030
2898599842,67cyclictest0-21swapper/019:50:030
28985998235,23cyclictest10750irq/39-dwc_otg_20:40:020
2898599792,4cyclictest0-21swapper/020:15:020
2898599792,4cyclictest0-21swapper/020:15:020
28986997816,17cyclictest30471-21cat19:45:021
2898599772,9cyclictest29635-21latency_hist19:25:030
2898599751,9cyclictest1278-21latency_hist20:50:030
2898599742,36cyclictest0-21swapper/020:35:030
2898599731,27cyclictest29737-21latency_hist19:30:020
28985997125,5cyclictest10650irq/39-dwc_otg19:20:010
2898599712,27cyclictest0-21swapper/019:55:020
28986997014,13cyclictest31169-21kworker/u8:220:00:011
28985997011,11cyclictest0-21swapper/019:35:030
2898599682,27cyclictest0-21swapper/019:40:440
2898599681,35cyclictest0-21swapper/019:58:170
28985996752,6cyclictest0-21swapper/020:25:020
28985996722,8cyclictest10650irq/39-dwc_otg19:15:020
28986996616,14cyclictest30875-21latency_hist19:50:031
28986996616,14cyclictest30875-21latency_hist19:50:031
2898599661,26cyclictest0-21swapper/020:28:440
28986996522,24cyclictest29824-21grep19:30:021
2898599658,46cyclictest0-21swapper/020:20:030
2898699649,20cyclictest892-21latency_hist20:45:021
2898699646,15cyclictest32471-21latency_hist20:25:021
2898599646,16cyclictest881-21latency_hist20:45:020
2898599643,23cyclictest0-21swapper/020:00:040
2898599641,8cyclictest590-21sshd20:07:440
2898699634,11cyclictest10850irq/39-dwc_otg_19:15:021
28986996315,17cyclictest32717-21latency_hist20:30:021
28985996314,9cyclictest1514-21latency_hist20:55:030
28986996128,11cyclictest29964-21munin-run19:35:021
28986996116,13cyclictest30199-21run-parts19:40:011
2898699596,10cyclictest31645-21latency_hist20:10:021
28986995917,7cyclictest10850irq/39-dwc_otg_20:05:021
2898799583,11cyclictest10750irq/39-dwc_otg_20:50:022
2898699588,32cyclictest10650irq/39-dwc_otg19:19:331
28986995811,13cyclictest1-21systemd20:18:441
2898699565,11cyclictest1236-21latency_hist20:50:021
2898699553,14cyclictest0-21swapper/120:15:021
2898699553,14cyclictest0-21swapper/120:15:021
28986995518,21cyclictest0-21swapper/120:35:031
2898699539,21cyclictest1336-21latency_hist20:55:021
2898699517,18cyclictest0-21swapper/120:40:031
2898799509,32cyclictest0-21swapper/219:25:022
28986995014,14cyclictest10750irq/39-dwc_otg_19:55:031
2898699493,11cyclictest10850irq/39-dwc_otg_19:25:021
2898899488,16cyclictest0-21swapper/320:50:023
2898799468,8cyclictest898-21ls20:45:022
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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