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2021-11-28 - 00:20

VIA QuadCore L4700 @ 1.2+ GHz, Linux 3.18.43-rt46 (Profile)

Latency plot of system in rack #b, slot #4
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackbslot4.osadl.org (updated Sat Nov 27, 2021 00:43:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1202299764,5cyclictest0-21swapper/123:02:151
1202299754,6cyclictest0-21swapper/123:32:141
12022997512,56cyclictest0-21swapper/119:58:411
1204399734,63cyclictest0-21swapper/323:50:043
1204399733,64cyclictest0-21swapper/320:06:393
1204399724,63cyclictest0-21swapper/321:30:033
1204399724,62cyclictest0-21swapper/319:25:453
1204399714,62cyclictest0-21swapper/320:52:433
1204399713,63cyclictest0-21swapper/322:17:413
1204399713,63cyclictest0-21swapper/321:42:423
1204399713,62cyclictest0-21swapper/320:47:083
1202299716,7cyclictest0-21swapper/121:52:151
1202299715,7cyclictest0-21swapper/100:12:451
1204399703,62cyclictest0-21swapper/319:12:463
1202299705,7cyclictest0-21swapper/123:42:241
1202299705,59cyclictest0-21swapper/100:37:501
1202299705,58cyclictest0-21swapper/123:18:281
1202299705,58cyclictest0-21swapper/121:58:421
1202299705,58cyclictest0-21swapper/121:58:421
1202299705,58cyclictest0-21swapper/100:29:331
1202299704,30cyclictest28620-21ssh21:18:491
1202299703,60cyclictest0-21swapper/122:10:321
1204399696,58cyclictest0-21swapper/321:08:173
1204399694,60cyclictest0-21swapper/319:40:453
1204399693,7cyclictest0-21swapper/320:58:203
1204399693,60cyclictest0-21swapper/320:10:393
1204399693,60cyclictest0-21swapper/319:33:363
1203399693,60cyclictest6034-21sshd21:35:372
1202299699,54cyclictest0-21swapper/122:52:571
1202299699,54cyclictest0-21swapper/122:52:571
1202299697,5cyclictest0-21swapper/122:42:461
1202299695,7cyclictest0-21swapper/122:55:111
1202299695,6cyclictest0-21swapper/123:53:501
1202299695,58cyclictest0-21swapper/100:02:201
1202299694,7cyclictest0-21swapper/123:07:321
1202299693,9cyclictest0-21swapper/119:53:501
1202299693,9cyclictest0-21swapper/119:53:501
1202299693,59cyclictest0-21swapper/121:06:331
1202299693,34cyclictest0-21swapper/121:10:531
1202299693,34cyclictest0-21swapper/121:10:531
1204399683,59cyclictest0-21swapper/319:15:163
1202299685,7cyclictest0-21swapper/123:49:341
1202299685,57cyclictest0-21swapper/122:05:281
1202299685,30cyclictest0-21swapper/122:26:171
1202299684,7cyclictest0-21swapper/122:33:311
1202299684,7cyclictest0-21swapper/122:14:151
1202299684,57cyclictest0-21swapper/123:27:091
1202299683,59cyclictest0-21swapper/100:14:181
1202299683,33cyclictest12782-21users00:18:481
1202299675,7cyclictest0-21swapper/122:31:101
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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