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2022-07-03 - 19:32

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #b, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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x86 Intel Core i5-1135G7 @2400 MHz, Linux 5.15.21-rt30 (Profile)

Latency plot of shadow in rack #b, slot #8
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackbslot8s (updated Sun Jul 03, 2022 12:44:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
10764602145118,9sleep10-21swapper/107:05:311
10765372129115,9sleep20-21swapper/207:06:362
10766692128113,10sleep60-21swapper/607:08:336
10764552124109,10sleep50-21swapper/507:05:275
1076762212094,10sleep30-21swapper/307:09:503
10766222119106,8sleep40-21swapper/407:07:504
10765782117103,9sleep70-21swapper/707:07:147
10765532117103,9sleep00-21swapper/007:06:500
1077039991020,101cyclictest0-21swapper/710:31:577
107703499102100,2cyclictest546-21snmpd08:27:396
10770189910299,3cyclictest546-21snmpd11:51:172
10770189910299,3cyclictest546-21snmpd07:18:062
10770189910298,4cyclictest546-21snmpd11:41:562
10770189910298,4cyclictest546-21snmpd11:38:082
107701099102100,1cyclictest546-21snmpd11:26:200
1077039991010,100cyclictest0-21swapper/707:22:547
1077039991010,0cyclictest0-21swapper/709:26:347
1077034991010,101cyclictest0-21swapper/611:14:166
1077034991010,101cyclictest0-21swapper/609:08:276
1077034991010,101cyclictest0-21swapper/608:46:226
1077030991010,100cyclictest0-21swapper/508:13:025
10770229910199,2cyclictest546-21snmpd09:36:373
107702299101100,1cyclictest546-21snmpd09:06:013
10770189910199,2cyclictest546-21snmpd10:05:112
107701899101100,1cyclictest546-21snmpd09:40:072
1077018991010,100cyclictest0-21swapper/212:11:452
10770139910199,2cyclictest546-21snmpd09:34:101
1077013991010,100cyclictest0-21swapper/112:09:061
1077013991010,100cyclictest0-21swapper/111:50:421
1077013991010,100cyclictest0-21swapper/109:41:041
1077013991010,100cyclictest0-21swapper/109:37:191
1077010991010,100cyclictest0-21swapper/012:25:370
1077010991010,100cyclictest0-21swapper/009:02:240
1077039991000,99cyclictest0-21swapper/710:25:457
1077039991000,99cyclictest0-21swapper/709:06:457
1077039991000,99cyclictest0-21swapper/708:43:367
1077039991000,99cyclictest0-21swapper/708:17:537
1077039991000,99cyclictest0-21swapper/707:58:017
1077039991000,98cyclictest0-21swapper/712:35:287
1077039991000,1cyclictest0-21swapper/710:21:517
1077039991000,0cyclictest0-21swapper/708:00:357
10770349910099,1cyclictest546-21snmpd07:10:186
10770349910097,3cyclictest546-21snmpd12:17:396
10770349910097,3cyclictest1225685-21cat10:25:146
1077034991000,99cyclictest0-21swapper/612:22:166
1077034991000,99cyclictest0-21swapper/608:36:356
1077034991000,99cyclictest0-21swapper/608:36:356
1077034991000,99cyclictest0-21swapper/608:10:356
1077034991000,1cyclictest0-21swapper/610:40:306
1077034991000,100cyclictest0-21swapper/608:15:416
10770309910099,1cyclictest546-21snmpd09:17:135
10770309910099,1cyclictest546-21snmpd08:47:275
10770309910099,1cyclictest546-21snmpd08:06:495
1077030991000,99cyclictest0-21swapper/512:39:045
1077030991000,99cyclictest0-21swapper/512:29:405
1077030991000,99cyclictest0-21swapper/507:54:235
1077030991000,100cyclictest0-21swapper/509:46:265
1077030991000,100cyclictest0-21swapper/508:28:205
1077030991000,100cyclictest0-21swapper/507:11:305
10770269910099,1cyclictest546-21snmpd11:49:534
10770269910099,1cyclictest546-21snmpd11:16:074
10770269910099,1cyclictest546-21snmpd11:07:374
10770269910099,1cyclictest546-21snmpd10:18:234
10770269910099,1cyclictest546-21snmpd07:55:254
1077026991000,99cyclictest0-21swapper/412:08:214
1077026991000,99cyclictest0-21swapper/411:25:084
1077026991000,100cyclictest0-21swapper/412:38:014
10770229910099,1cyclictest546-21snmpd12:00:303
10770229910099,1cyclictest546-21snmpd11:11:223
10770229910099,1cyclictest546-21snmpd11:04:203
10770229910099,1cyclictest546-21snmpd09:55:423
10770229910099,1cyclictest546-21snmpd09:25:343
10770229910099,1cyclictest546-21snmpd09:04:033
10770229910099,1cyclictest546-21snmpd08:30:353
10770229910098,2cyclictest546-21snmpd12:05:123
10770229910098,2cyclictest546-21snmpd11:44:563
10770229910098,1cyclictest572-21lldpd11:15:053
10770229910097,3cyclictest546-21snmpd08:16:393
10770189910099,1cyclictest546-21snmpd11:56:482
10770189910099,1cyclictest546-21snmpd09:04:552
10770189910098,2cyclictest546-21snmpd08:10:202
10770189910098,2cyclictest546-21snmpd07:26:332
10770189910098,1cyclictest546-21snmpd07:24:372
10770189910097,3cyclictest546-21snmpd09:36:012
10770189910097,0cyclictest546-21snmpd07:33:332
1077018991000,100cyclictest0-21swapper/212:19:332
1077018991000,100cyclictest0-21swapper/209:19:372
10770139910099,1cyclictest546-21snmpd12:39:221
10770139910099,1cyclictest546-21snmpd08:41:451
10770139910099,1cyclictest546-21snmpd07:56:371
10770139910099,1cyclictest546-21snmpd07:10:211
1077013991000,99cyclictest1138509-21diskmemload09:47:501
1077013991000,99cyclictest0-21swapper/110:00:591
1077013991000,100cyclictest0-21swapper/111:27:451
1077013991000,100cyclictest0-21swapper/108:52:481
1077013991000,100cyclictest0-21swapper/108:07:341
10770109910099,1cyclictest546-21snmpd09:11:090
10770109910099,1cyclictest546-21snmpd08:33:020
1077010991000,99cyclictest0-21swapper/010:02:500
1077010991000,100cyclictest0-21swapper/010:54:560
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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