You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2024-07-12 - 17:05

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #b, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackbslot8s (updated Thu Jul 11, 2024 12:44:17)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
14212262132104,8sleep40-21swapper/407:09:514
14181542124107,9sleep10-21swapper/107:05:161
14176452121107,9sleep70-21swapper/707:05:057
14206932120106,9sleep30-21swapper/307:07:593
14188642120107,8sleep50-21swapper/507:05:275
14202462119104,10sleep60-21swapper/607:06:326
14209972118104,9sleep00-21swapper/007:09:070
14194572117103,9sleep20-21swapper/207:05:412
1421500991030,100cyclictest0-21swapper/412:23:224
14215089910298,4cyclictest573-21snmpd08:55:166
1421500991020,102cyclictest0-21swapper/412:26:354
1421500991020,102cyclictest0-21swapper/410:25:014
1421500991020,0cyclictest0-21swapper/410:04:194
1421500991020,0cyclictest0-21swapper/408:31:424
1421489991020,102cyclictest0-21swapper/110:06:061
14215089910198,3cyclictest573-21snmpd09:48:006
14215089910198,3cyclictest573-21snmpd09:42:266
142150499101100,1cyclictest573-21snmpd07:58:575
14215009910199,2cyclictest573-21snmpd11:50:064
14215009910199,2cyclictest573-21snmpd09:42:424
14215009910198,3cyclictest573-21snmpd07:34:174
1421500991010,101cyclictest0-21swapper/408:35:184
14214969910199,2cyclictest573-21snmpd11:28:243
14214969910198,3cyclictest573-21snmpd09:45:593
1421494991010,100cyclictest0-21swapper/208:37:032
14214899910199,2cyclictest573-21snmpd12:27:091
14214899910199,2cyclictest573-21snmpd12:05:431
14214899910199,2cyclictest573-21snmpd11:31:191
14214899910199,2cyclictest573-21snmpd10:30:341
14214899910199,2cyclictest573-21snmpd09:53:481
14214899910198,3cyclictest573-21snmpd09:39:411
1421489991010,0cyclictest0-21swapper/112:17:311
1421489991010,0cyclictest0-21swapper/111:37:361
14214819910199,1cyclictest573-21snmpd11:42:330
14214819910199,1cyclictest573-21snmpd10:27:520
1421513991000,100cyclictest0-21swapper/709:26:597
1421513991000,100cyclictest0-21swapper/708:48:067
14215089910099,1cyclictest573-21snmpd08:34:576
14215089910099,1cyclictest1545910-21cat10:05:206
14215089910099,0cyclictest573-21snmpd10:47:046
1421508991000,99cyclictest0-21swapper/612:03:466
1421508991000,99cyclictest0-21swapper/610:03:006
14215049910099,1cyclictest573-21snmpd12:31:475
14215049910099,1cyclictest573-21snmpd09:48:425
14215049910099,1cyclictest573-21snmpd09:35:265
14215049910099,1cyclictest573-21snmpd08:53:355
14215049910099,1cyclictest573-21snmpd08:02:275
14215049910099,1cyclictest573-21snmpd07:35:535
14215049910099,1cyclictest573-21snmpd07:33:015
14215049910099,1cyclictest0-21swapper/512:07:235
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional