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2024-07-27 - 03:26

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #b, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackbslot8s (updated Fri Jul 26, 2024 12:44:17)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
37312082136121,10sleep20-21swapper/207:09:082
37312542132119,8sleep10-21swapper/107:09:471
37311762128114,9sleep60-21swapper/607:08:416
37309722127111,11sleep70-21swapper/707:05:467
37308482125110,9sleep30-21swapper/307:05:253
37311082124110,9sleep40-21swapper/407:07:434
37312402121107,9sleep50-21swapper/507:09:365
37311222120106,9sleep00-21swapper/007:07:550
3731499991030,102cyclictest0-21swapper/111:06:011
3731523991020,100cyclictest0-21swapper/708:43:267
37315119910299,3cyclictest573-21snmpd10:53:004
37315119910299,2cyclictest573-21snmpd07:21:504
3731511991020,99cyclictest0-21swapper/407:12:534
3731511991020,99cyclictest0-21swapper/407:12:524
3731511991020,102cyclictest0-21swapper/412:06:564
3731511991020,100cyclictest3793095-21diskmemload12:10:134
37315079910299,3cyclictest573-21snmpd10:58:253
3731503991020,102cyclictest3878502-21grep10:25:202
37314999910299,3cyclictest573-21snmpd08:26:431
37314949910297,1cyclictest573-21snmpd11:19:350
3731523991010,100cyclictest0-21swapper/710:13:257
37315209910199,2cyclictest573-21snmpd10:15:056
3731516991010,100cyclictest0-21swapper/512:17:465
37315119910199,2cyclictest573-21snmpd12:32:124
37315119910199,2cyclictest573-21snmpd10:55:334
37315119910199,2cyclictest573-21snmpd09:06:124
37315119910199,2cyclictest0-21swapper/411:40:134
37315119910199,2cyclictest0-21swapper/411:40:134
3731511991010,101cyclictest0-21swapper/408:24:004
3731511991010,100cyclictest0-21swapper/409:26:304
37315079910199,2cyclictest573-21snmpd12:23:493
37315079910199,2cyclictest573-21snmpd12:01:443
37315079910199,2cyclictest573-21snmpd10:47:183
37315079910198,3cyclictest573-21snmpd11:46:573
37315079910198,3cyclictest573-21snmpd10:27:443
37314999910199,2cyclictest573-21snmpd08:16:391
37314999910199,1cyclictest603-21lldpd10:58:101
3731499991010,99cyclictest0-21swapper/109:15:571
3731499991010,100cyclictest0-21swapper/112:39:291
3731499991010,0cyclictest0-21swapper/108:52:351
3731499991010,0cyclictest0-21swapper/107:54:441
37314949910199,2cyclictest573-21snmpd09:38:070
37314949910199,2cyclictest573-21snmpd09:18:300
3731494991010,100cyclictest0-21swapper/008:00:210
3731523991000,99cyclictest0-21swapper/712:15:527
3731523991000,99cyclictest0-21swapper/710:42:247
3731523991000,99cyclictest0-21swapper/710:39:417
3731523991000,99cyclictest0-21swapper/709:19:387
3731523991000,100cyclictest0-21swapper/712:21:527
3731523991000,100cyclictest0-21swapper/710:59:227
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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