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2025-04-18 - 18:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot1.osadl.org (updated Fri Apr 18, 2025 13:45:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3210:20:269084
16,10:19:559083
36,10:19:559082
32,10:19:559081
33,10:19:559080
33,10:19:559079
30,10:19:559078
17,10:19:559077
34,10:19:559076
36,10:19:559075
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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