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2024-11-04 - 21:31
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot1.osadl.org (updated Mon Nov 04, 2024 13:44:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3216:13:529084
16,16:13:219083
36,16:13:219082
32,16:13:219081
33,16:13:219080
33,16:13:219079
30,16:13:219078
17,16:13:219077
34,16:13:219076
36,16:13:219075
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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