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2023-02-07 - 18:14

x86 Intel Core i7-X990 @3467 MHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #c, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100, Linux 4.9.20-rt16, x86_64 highest latencies:
System rackcslot1.osadl.org (updated Tue Feb 07, 2023 12:48:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
390799950,84rtkit-daemon0-21swapper/607:07:028
1096228071,6sleep50-21swapper/507:06:527
1114427465,6sleep30-21swapper/307:09:275
1113927263,6sleep110-21swapper/1107:09:223
980827060,7sleep80-21swapper/807:05:1910
1099226959,7sleep90-21swapper/907:07:2011
131622650,1sleep2351ktimersoftd/212:25:234
1115526455,6sleep10-21swapper/107:09:361
1109226454,7sleep00-21swapper/007:08:460
1092026354,6sleep40-21swapper/407:06:146
89162620,1sleep70-21swapper/709:30:229
1103426051,6sleep100-21swapper/1007:07:572
1098525950,6sleep20-21swapper/207:07:134
1097725747,7sleep70-21swapper/707:07:059
280742560,2sleep5107250irq/37-p5p1-TxR12:07:257
1162499388,21cyclictest0-21swapper/312:35:025
1161299288,15cyclictest0-21swapper/111:45:021
1163699275,18cyclictest0-21swapper/511:30:007
1163699262,16cyclictest0-21swapper/512:20:017
1161999253,12cyclictest0-21swapper/207:40:014
1161999253,12cyclictest0-21swapper/207:40:014
1166699246,13cyclictest0-21swapper/1012:35:022
1164499244,14cyclictest0-21swapper/607:15:028
1160699244,14cyclictest0-21swapper/009:50:020
1166199234,14cyclictest0-21swapper/910:35:0011
1162499234,14cyclictest0-21swapper/312:20:015
1161999234,14cyclictest0-21swapper/208:50:024
1161999234,14cyclictest0-21swapper/207:30:024
1161999234,14cyclictest0-21swapper/207:30:014
1161999234,12cyclictest0-21swapper/211:35:004
1161999233,15cyclictest0-21swapper/207:35:014
1161999233,15cyclictest0-21swapper/207:35:014
1161999231,15cyclictest0-21swapper/211:40:004
1166199224,13cyclictest0-21swapper/909:35:0111
1166199224,13cyclictest0-21swapper/909:10:0211
1164499224,13cyclictest0-21swapper/608:35:018
1164499223,12cyclictest0-21swapper/611:55:018
1163699223,13cyclictest0-21swapper/508:10:017
1163199226,12cyclictest0-21swapper/411:00:006
1162499224,13cyclictest0-21swapper/310:50:015
1162499224,13cyclictest0-21swapper/310:00:015
1161999224,13cyclictest0-21swapper/208:05:014
1167399214,12cyclictest0-21swapper/1112:35:013
1164499213,13cyclictest0-21swapper/610:30:008
1163699213,13cyclictest0-21swapper/508:45:027
1163199214,13cyclictest0-21swapper/409:35:016
1161999213,13cyclictest0-21swapper/207:50:024
1166699203,13cyclictest0-21swapper/1010:40:002
1164899204,11cyclictest0-21swapper/712:15:029
1164499204,11cyclictest0-21swapper/609:25:028
1163699204,11cyclictest0-21swapper/507:35:017
1163699204,11cyclictest0-21swapper/507:35:017
1163699204,11cyclictest0-21swapper/507:25:017
1163699204,11cyclictest0-21swapper/507:25:017
1163699203,12cyclictest0-21swapper/512:05:027
1163199204,11cyclictest0-21swapper/409:20:016
1163199203,12cyclictest0-21swapper/407:50:016
1161999204,14cyclictest0-21swapper/211:55:014
1161299205,10cyclictest20250irq/28-ahci[00012:40:021
1161299203,12cyclictest0-21swapper/107:45:021
1160699203,12cyclictest0-21swapper/008:55:020
1166699194,11cyclictest0-21swapper/1012:40:022
1166699194,10cyclictest0-21swapper/1010:20:012
1166699193,11cyclictest0-21swapper/1012:25:022
1166199193,11cyclictest0-21swapper/908:00:0111
1165499193,12cyclictest0-21swapper/811:30:0110
1165499192,12cyclictest0-21swapper/811:40:0110
1164899194,11cyclictest0-21swapper/710:19:419
1164499194,10cyclictest0-21swapper/607:30:028
1164499194,10cyclictest0-21swapper/607:30:028
1164499193,12cyclictest0-21swapper/609:05:028
1164499193,12cyclictest0-21swapper/607:19:118
1163199193,12cyclictest0-21swapper/412:15:026
1163199190,12cyclictest0-21swapper/411:40:186
1161999191,12cyclictest0-21swapper/209:50:014
1161299194,11cyclictest0-21swapper/110:25:011
1166199184,10cyclictest0-21swapper/912:20:0211
1165499184,8cyclictest0-21swapper/812:10:0110
1165499184,11cyclictest0-21swapper/809:15:0210
1165499182,11cyclictest0-21swapper/810:19:4310
1164899183,14cyclictest0-21swapper/711:00:009
1164499181,11cyclictest0-21swapper/610:50:018
1163699183,11cyclictest0-21swapper/509:30:027
1163199183,11cyclictest0-21swapper/408:15:026
1162499184,11cyclictest0-21swapper/312:30:025
1161999183,11cyclictest0-21swapper/209:55:014
1167399174,9cyclictest0-21swapper/1109:40:023
1164899172,11cyclictest0-21swapper/710:00:019
1164899170,3cyclictest0-21swapper/712:38:529
1164899170,12cyclictest0-21swapper/712:26:499
1164499174,11cyclictest0-21swapper/608:05:028
1163699173,11cyclictest0-21swapper/508:55:017
11624991715,1cyclictest24312-21turbostat07:34:565
11624991715,1cyclictest24312-21turbostat07:34:565
1160699173,10cyclictest0-21swapper/012:05:010
1160699172,10cyclictest0-21swapper/011:45:010
11673991612,3cyclictest0-21swapper/1112:17:223
11673991611,4cyclictest0-21swapper/1112:35:363
1167399160,15cyclictest0-21swapper/1112:21:133
1166699161,11cyclictest0-21swapper/1012:30:022
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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