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2022-11-29 - 20:06

x86 Intel Core i7-X990 @3467 MHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #c, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100, highest latencies:
System rackcslot1.osadl.org (updated Tue Nov 29, 2022 12:48:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2703921200,1sleep80-21swapper/809:35:4310
3907991090,98rtkit-daemon0-21swapper/707:09:379
2617527869,6sleep30-21swapper/307:06:005
2619027769,6sleep50-21swapper/507:06:157
2622227668,6sleep90-21swapper/907:06:4311
2634227555,7sleep80-21swapper/807:08:3010
2612627363,7sleep60-21swapper/607:05:268
2614327263,6sleep110-21swapper/1107:05:323
2620226960,6sleep20-21swapper/207:06:244
2400526957,6sleep40-21swapper/407:05:136
2618526658,6sleep00-21swapper/007:06:090
107132660,1sleep40-21swapper/411:15:146
2614226556,6sleep100-21swapper/1007:05:312
125282600,0sleep100-21swapper/1011:55:242
2632025749,6sleep10-21swapper/107:08:111
103432470,1sleep80-21swapper/812:32:1610
103432470,1sleep80-21swapper/812:32:1610
2697499324,21cyclictest0-21swapper/811:50:0110
2696799293,18cyclictest0-21swapper/710:35:019
2695099275,12cyclictest0-21swapper/411:30:006
2697499265,15cyclictest0-21swapper/809:05:0110
2692299265,15cyclictest0-21swapper/010:50:000
2692299265,15cyclictest0-21swapper/008:40:020
2697499254,15cyclictest0-21swapper/810:30:0110
2694499256,13cyclictest0-21swapper/312:25:025
2694499256,13cyclictest0-21swapper/312:25:015
2693399254,16cyclictest0-21swapper/211:10:004
2699199240,3cyclictest0-21swapper/1108:09:553
2697499244,15cyclictest0-21swapper/810:50:0010
2696799245,14cyclictest0-21swapper/709:40:019
2696799243,15cyclictest0-21swapper/709:00:019
2695799245,15cyclictest0-21swapper/511:40:017
2696799234,14cyclictest0-21swapper/707:30:019
2692299234,14cyclictest0-21swapper/008:35:020
2697899224,14cyclictest0-21swapper/912:20:0211
2697899224,13cyclictest0-21swapper/910:40:0011
2697499223,14cyclictest0-21swapper/810:00:0110
2697499223,14cyclictest0-21swapper/809:05:0210
2696799223,14cyclictest0-21swapper/709:55:019
2694499224,13cyclictest0-21swapper/309:15:015
2694499224,13cyclictest0-21swapper/307:45:005
2693399225,12cyclictest0-21swapper/210:50:014
2693399223,15cyclictest0-21swapper/210:05:014
2692999225,13cyclictest0-21swapper/109:00:011
2692999223,13cyclictest0-21swapper/111:25:011
2699199214,12cyclictest0-21swapper/1111:05:003
2697499214,12cyclictest0-21swapper/812:10:0110
2696799213,13cyclictest0-21swapper/712:15:019
2696199214,13cyclictest0-21swapper/607:50:028
2695099214,7cyclictest0-21swapper/410:55:006
2694499214,13cyclictest0-21swapper/309:40:005
2694499214,12cyclictest0-21swapper/310:15:015
2694499214,12cyclictest0-21swapper/308:50:015
2693399214,13cyclictest0-21swapper/208:45:024
2692999214,12cyclictest0-21swapper/112:10:021
2692999214,12cyclictest0-21swapper/108:10:021
2692299214,13cyclictest0-21swapper/009:25:010
2692299214,12cyclictest0-21swapper/009:55:010
2692299213,13cyclictest0-21swapper/007:55:020
235852210,1sleep100-21swapper/1012:10:152
2699199203,12cyclictest0-21swapper/1110:30:003
2699199203,12cyclictest0-21swapper/1108:50:023
2698499204,12cyclictest0-21swapper/1011:35:002
2697899204,11cyclictest0-21swapper/911:55:0211
26974992017,3cyclictest0-21swapper/807:49:5610
2696799204,12cyclictest0-21swapper/710:20:009
2696799204,12cyclictest0-21swapper/708:40:029
2696799204,11cyclictest0-21swapper/707:15:019
2696799203,12cyclictest0-21swapper/709:35:009
2696199204,12cyclictest0-21swapper/612:05:018
2696199203,12cyclictest0-21swapper/611:30:018
2695799204,11cyclictest0-21swapper/509:50:007
2694499203,12cyclictest0-21swapper/310:10:015
2693399203,12cyclictest0-21swapper/208:20:024
2692999204,11cyclictest0-21swapper/110:50:011
2692999203,13cyclictest0-21swapper/107:55:021
2692299203,12cyclictest0-21swapper/010:40:000
2699199193,11cyclictest0-21swapper/1109:20:003
2699199193,11cyclictest0-21swapper/1107:25:023
2697899193,12cyclictest0-21swapper/910:05:0011
26974991915,3cyclictest0-21swapper/812:28:4910
26974991915,3cyclictest0-21swapper/812:28:4810
2696799193,12cyclictest0-21swapper/711:15:019
2696799193,11cyclictest0-21swapper/712:00:029
2696199192,12cyclictest0-21swapper/611:39:238
2694499194,12cyclictest0-21swapper/311:00:015
2694499193,12cyclictest0-21swapper/312:35:025
2694499193,12cyclictest0-21swapper/312:35:015
2694499193,11cyclictest0-21swapper/307:55:025
2694499191,12cyclictest0-21swapper/307:20:025
26933991914,3cyclictest0-21swapper/212:23:354
26933991914,3cyclictest0-21swapper/212:23:354
2692299197,8cyclictest3637-1kworker/0:0H12:25:020
2692299197,8cyclictest3637-1kworker/0:0H12:25:010
2692299193,11cyclictest0-21swapper/009:15:010
2692299191,13cyclictest0-21swapper/011:45:010
2699199183,11cyclictest0-21swapper/1109:25:013
2697899184,11cyclictest0-21swapper/910:55:0111
2697899183,12cyclictest0-21swapper/907:35:0011
2697499183,11cyclictest0-21swapper/807:35:0210
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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