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2021-07-26 - 18:46

Intel(R) Core(TM) i7 CPU X 990 @ 3.47GHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #c, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackcslot1.osadl.org (updated Mon Jul 26, 2021 12:48:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3954991000,90rtkit-daemon0-21swapper/107:08:521
282552870,1sleep40-21swapper/410:59:596
1736328172,6sleep40-21swapper/407:05:196
263512760,1sleep100-21swapper/1010:20:012
395499750,65rtkit-daemon0-21swapper/007:05:070
1866727364,6sleep110-21swapper/1107:07:143
1870027262,6sleep30-21swapper/307:07:435
1859727261,7sleep90-21swapper/907:06:1211
1868727061,6sleep50-21swapper/507:07:337
1884626960,6sleep60-21swapper/607:09:468
1598126552,6sleep100-21swapper/1007:05:012
1867126352,7sleep20-21swapper/207:07:184
1866426151,7sleep80-21swapper/807:07:1110
12722610,1sleep30-21swapper/311:41:155
126572590,1sleep90-21swapper/910:40:2611
1859525748,6sleep70-21swapper/707:06:109
191422540,1sleep728047-21diskmemload12:02:359
299282500,0sleep61935499cyclictest11:37:548
106302470,1sleep90-21swapper/911:52:2311
44252420,2sleep71936299cyclictest12:23:019
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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