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2026-05-18 - 11:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackcslot2.osadl.org (updated Mon May 18, 2026 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
191452690,1sleep00-21swapper/022:49:060
2582526654,8sleep10-21swapper/119:04:591
2445726549,8sleep00-21swapper/019:04:060
26385994310,23cyclictest0-21swapper/000:05:400
26385994210,24cyclictest0-21swapper/021:52:550
26385994121,19cyclictest12465-21ls19:54:160
26385994110,30cyclictest0-21swapper/020:54:060
26385994110,30cyclictest0-21swapper/000:31:460
26385994010,30cyclictest0-21swapper/022:39:070
26385994010,29cyclictest0-21swapper/022:01:470
26385994010,29cyclictest0-21swapper/021:26:500
26385994010,29cyclictest0-21swapper/019:34:130
26385994010,28cyclictest0-21swapper/021:36:470
26385993915,23cyclictest0-21swapper/019:19:070
26385993910,8cyclictest13728-21ssh21:15:140
26385993910,29cyclictest0-21swapper/023:37:340
26385993910,29cyclictest0-21swapper/021:47:110
26385993910,29cyclictest0-21swapper/019:09:150
26385993910,28cyclictest0-21swapper/021:54:110
26385993910,28cyclictest0-21swapper/021:13:200
26385993910,28cyclictest0-21swapper/020:39:160
26385993910,28cyclictest0-21swapper/019:40:380
26385993910,27cyclictest0-21swapper/022:08:500
26385993910,24cyclictest0-21swapper/022:14:570
26385993810,27cyclictest0-21swapper/023:29:110
26385993810,27cyclictest0-21swapper/021:39:100
26385993810,26cyclictest0-21swapper/023:51:330
26385993810,26cyclictest0-21swapper/019:29:300
26385993810,22cyclictest0-21swapper/020:49:070
26386993727,3cyclictest29166-21df22:19:081
26385993710,26cyclictest0-21swapper/022:56:310
26385993710,26cyclictest0-21swapper/022:28:280
26385993710,26cyclictest0-21swapper/020:34:130
26385993710,26cyclictest0-21swapper/000:19:150
26385993710,26cyclictest0-21swapper/000:15:120
26385993612,23cyclictest0-21swapper/023:16:590
26385993610,26cyclictest0-21swapper/021:29:120
26385993610,25cyclictest0-21swapper/000:34:070
26385993610,25cyclictest0-21swapper/000:24:140
26385993610,24cyclictest0-21swapper/022:35:250
2638699355,0cyclictest91rcu_preempt21:55:501
26385993510,25cyclictest0-21swapper/022:59:110
26385993510,24cyclictest0-21swapper/023:54:090
26385993510,24cyclictest0-21swapper/022:09:140
26385993510,24cyclictest0-21swapper/020:19:080
26385993510,24cyclictest0-21swapper/019:26:140
26385993510,24cyclictest0-21swapper/000:11:080
26385993510,23cyclictest0-21swapper/023:24:140
26385993510,21cyclictest0-21swapper/019:44:110
2638599350,3cyclictest4052-21/usr/sbin/munin22:29:160
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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