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2023-06-01 - 14:02

x86 Intel Celeron G3900 @2800 MHz, Linux 6.1.12-rt7 (Profile)

Latency plot of system in rack #c, slot #5
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot5.osadl.org (updated Wed May 31, 2023 12:43:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
709299470,46cyclictest29072-21meminfo11:10:291
709299460,44cyclictest15689-21meminfo07:30:251
709299440,42cyclictest7636-21meminfo08:35:231
709299440,42cyclictest16928-21meminfo09:00:311
709299430,41cyclictest25168-21meminfo07:55:231
709199430,41cyclictest5964-21meminfo11:35:280
709199430,41cyclictest4108-21meminfo11:30:250
709299420,40cyclictest19798-21meminfo10:45:241
709299420,40cyclictest1197-21meminfo09:45:261
709299410,39cyclictest2096-21meminfo08:20:331
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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