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2024-05-20 - 17:47
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackcslot5.osadl.org (updated Mon May 20, 2024 13:06:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
5509:04:246482
51,09:03:296481
009:03:296477
0,09:03:296476
0,09:03:296475
0,09:03:296474
0,09:03:296473
0,09:03:296472
0,09:03:296471
0,09:03:296470
0,09:03:296469
0,09:03:296468
0,09:03:296467
0,09:03:296466
0,09:03:296465
0,09:03:296464
0,09:03:296463
0,09:03:296462
0,09:03:296461
0,09:03:296460
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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