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2022-05-28 - 16:03

x86 Intel Celeron G3900 @2800 MHz, Linux 5.10.35-rt39 (Profile)

Latency plot of system in rack #c, slot #5
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackcslot5.osadl.org (updated Sat May 28, 2022 12:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
851899280,27cyclictest27588-21meminfo07:55:181
851799240,23cyclictest11752-21meminfo07:15:170
851799220,21cyclictest27587-21meminfo07:55:170
851799190,18cyclictest29572-21meminfo08:00:170
851899160,15cyclictest25570-21meminfo07:50:191
851899151,11cyclictest16711-21runrttasks07:29:291
851899150,15cyclictest10508-21meminfo07:15:011
851799151,7cyclictest7834-21kworker/u4:209:35:040
851799150,10cyclictest18543-21idleruntime-cro10:50:000
851899141,10cyclictest8880-21seq09:30:131
851799144,5cyclictest17533-21kworker/u4:110:59:440
851799143,6cyclictest9185-1kworker/u5:110:10:160
851799140,6cyclictest8098-21cron09:25:000
851899135,2cyclictest15034-21kworker/u4:410:51:351
851899131,8cyclictest10517-21taskset09:44:361
851799134,6cyclictest28872-21taskset12:14:260
851799132,5cyclictest12358-1kworker/u5:010:01:540
851799130,13cyclictest23467-21meminfo07:45:160
851799130,10cyclictest18751-21sleep07:34:590
851899123,4cyclictest18299-21chrt10:47:381
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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