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2023-10-01 - 00:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot6.osadl.org (updated Sat Sep 30, 2023 00:46:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2151991030,90rtkit-daemon0-21swapper/219:05:542
28057592850,0sleep549-21ksoftirqd/523:25:265
27120312850,0sleep00-21swapper/022:00:300
2584826998416,35cyclictest0-21swapper/723:32:447
2584826998415,38cyclictest0-21swapper/720:22:457
2584784998416,37cyclictest0-21swapper/120:57:441
2584826998314,36cyclictest0-21swapper/719:22:457
2584784998316,36cyclictest0-21swapper/122:32:451
26363042820,0sleep50-21swapper/520:35:295
258456228259,11sleep50-21swapper/519:09:445
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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